Luca Carloni's Publications (by year, by topic)

Luca P. Carloni - Publications

    2026

  1. J. Zuckerman, M. Cochet, M. Cassel dos Santos, E. J. Loscalzo, K. Swaminathan, T. Jia, D. Giri, T. Tambe, J. J. Zhang, A. Buyuktosunoglu, K.-L. Chiu, G. Di Guglielmo, P. Mantovani, L. Piccolboni, G. Tombesi, D. Trilla, J-D. Wellman, E- Y. Yang, A. Amarnath, Y. Jing, B. Mishra, J. Park, V. Suresh, S. Zaliasl, M. Lekas, S. Cahill, H. Sadeghi, J. Meyer, N. Sturcken, S. Adve, D. Brooks, G.-Y. Wei, K.L. Shepard, P. Bose and L. P. Carloni
    EPOCHS-1: A 12nm Highly Heterogeneous Open-Source SoC with Distributed Coin-Based Power Management and Integrated Hybrid Voltage Regulation
    IEEE Journal of Solid State Circuits (to appear).

    2. 2025

  2. T. Jung, N. Zeng, J. D. Fabbri, G. Eichler, Z. Li, E. Zabeh, A. Das, K. Willeke, K. E. Wingel, A. Dubey, R. Huq, M. Sharma, Y. Hu, G. Ramakrishnan, K. Tien, P. Mantovani, A. Parihar, H. Yin, D. Oswalt, A. Misdorp, I. Uguz, T. Shinn, G. J. Rodriguez, C. Nealley, T. van der Molen, S. Sanborn, I. Gonzales, M. Roukes, J. Knecht, K. S. Kosik, D. Yoshor, P. Canoll, E. Spinazzi, L. P. Carloni, B. Pesaran, S. Patel, J. Jacobs, B. Youngerman, R. J. Cotton, A. Tolias and K. L. Shepard
    A Wireless Subdural-Contained Brain-Computer Interface with 65,536 Electrodes and 1,024 Channels
    Nature Electronics, 2025.

  3. P.-H. Tsai, M. Cassel dos Santos, J. Zuckerman, K.-L. Chiu and L. P. Carloni
    Optimization of Wire Pipelining and Channel Parallelism for 2D-Mesh NoC Physical Design
    The Proceedings of the International Conference on Computer Design (ICCD), 2025.

  4. G. Eichler, Y. Gilhotra, N. Zeng, M. Kim, K. Shepard, and L. P. Carloni
    MINDFUL: Safe, Implantable, Large-Scale Brain-Computer Interfaces from a System-Level Design Perspective
    IEEE/ACM International Symposium on Microarchitecture (MICRO-58), 2025.

  5. A. Boston, B. Seyoum, L. Carloni and P.-E. Gaillardon
    Lightweight Congruence Profiling for Early Design Exploration of Heterogeneous FPGAs
    33rd IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2025.

  6. G. Tombesi, J. Yang, J. Zuckerman, D. Giri, W. Baisi and L. P. Carloni
    FLIP2M: Flexible Intra-layer Parallelism and Inter-layer Pipelining for Multi-Model AR/VR workloads
    Presented at the International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2025.
    ACM Transactions on Embedded Computing Systems, (to appear).

  7. J. Yang, G. Tombesi, J. Zuckerman, and L. P. Carloni
    ReconFormer: A Multi-Level Run-time Reconfigurable System-on-Chip for Accelerating Transformers
    The Proceedings of the International Conference on Field-Programmable Logic and Applications (FPL), 2025

  8. F. Restuccia, Z. Ma, J. Zuckerman, A. Meza, B. Seyoum, L. Carloni, and R. Kastner
    BASTION: A Framework for Secure Third-Party IP Integration in NoC-based SoC Platforms
    Cryptographic Hardware and Embedded Systems (CHES) Conference, 2025
    IACR Transactions on Cryptographic Hardware and Embedded Systems, 2025

  9. M. Cochet, K. Swaminathan , E. J. Loscalzo, J. Zuckerman, M. Cassel dos Santos, D. Giri, A. Buyuktosunoglu, T. Jia, D. Brooks, G.-Y. Wei, K. Shepard, L. P. Carloni, and P. Bose
    BlitzCoin: Fully Decentralized Hardware Power Management for Accelerator-Rich SoCs
    IEEE Micro Special Issue on Top Picks From the 2024 Computer Architecture Conferences, Vol. 45, No. 3, July/August 2025.

  10. E. L. Alvanaki, K. Lee, and L. P. Carloni
    SLDB: An End-To-End Heterogeneous System-on-Chip Benchmark Suite for LLM-Aided Design
    The Proceedings of the IEEE International Conference on LLM-Aided Design, 2025

  11. G. Eichler, J, Zuckerman, and L. P. Carloni
    An Energy-Efficient Kalman Filter Architecture with Tunable Accuracy for Brain-Computer Interfaces
    The Proceedings of the Design Automation Conference (DAC), 2025.

  12. G. Tombesi, J. Zuckerman, M. Abuhazi, S.V. Battula, M. Cassel dos Santos, K.-L. Chiu, G. Eichler, S. Raveendran, B. Seyoum, P.-H. Tsai, A. Vanamali, J. Yang, and L. P. Carloni
    Teaching Collaborative SoC Engineering with HLS-Based Accelerator Design and Agile System-Level Integration
    Workshop on Computer Architecture Education (WCAE), 2025.

  13. G. Eichler, J, Zuckerman, and L. P. Carloni
    KalmMind: A Configurable Kalman Filter Design Framework for Embedded Brain-Computer Interfaces
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2025.

  14. M. N. Bhat, M. Russo, L. P. Carloni, G. Di Guglielmo, F. Fahim, A. C. Y. Li, and G. N. Perdue
    Machine learning for arbitrary single-qubit rotations on an embedded device
    Quantum Machine Intelligence, Vol. 7, Article No. 8, January 2025.

    15. 2024

  15. K.-L. Chiu, G. Eichler, C.-T. Lin, G. Di Guglielmo and L. P. Carloni
    WOLT: Transparent Deployment of ML Workloads on Lightweight Many-Accelerator Architectures
    The Proceedings of the International Conference on Computer Design (ICCD), 2024.

  16. T. Eilam, P. Bose, L. P. Carloni, A. Cidon, H. Franke, M. A. Kim, E. K. Lee, M. Naghshineh, P. Parida, C. S. Stein, and A. N. Tantawi
    Reducing Datacenter Compute Carbon Footprint by Harnessing the Power of Specialization: Principles, Metrics, Challenges and Opportunities
    IEEE Transactions on Semiconductor Manufacturing, Vol. 37, No. 4, November 2024.

  17. V. Suresh, B. Mishra, Z. Zhu, Y. Jing, N. Jin, C. Block, P. Mantovani, D. Giri, J. Zuckerman, L. Carloni, S. Adve
    Mozart: Taming Taxes and Composing Accelerators with Shared-Memory
    International Conference on Parallel Architectures and Compilation Techniques (PACT), 2024.

  18. B. Stitic, L. Urbinati, G. Di Guglielmo, L. P. Carloni, M. R. Casu,
    Enhanced Machine-Learning Flow for Microwave- Sensing Systems for Contaminant Detection in Food
    IEEE Transactions on AgriFood Electronics, Vol. 2, No. 2, September/October 2024.

  19. F. Restuccia, B. Seyoum, A. Redding, Z. Ma, G. Eichler, L. Carloni, R. Kastner
    Open-CFR: Open-source Co-design Framework for Redundancy with DPR in COTS FPGA SoCs
    IEEE Space Mission Challenges for Information Technology - IEEE Space Computing Conference, (SMC-IT/SCC), 2024.

  20. M. Cochet, K. Swaminathan , E. J. Loscalzo, J. Zuckerman, M. Cassel dos Santos, D. Giri, A. Buyuktosunoglu, T. Jia, D. Brooks, G.-Y. Wei, K. Shepard, L. P. Carloni, P. Bose
    BlitzCoin: Fully Decentralized Hardware Power Management for Accelerator-Rich SoCs
    International Symposium on Computer Architecture (ISCA), 2024.

  21. E. Loscalzo, M. Cochet, J. Zuckerman, S. Zaliasl, M. Lekas, S. Cahill, T. Jia, K. Swaminathan, M. Cassel dos Santos, D. Giri, H. Sadeghi, J. Meyer, N. Sturcken, D. Brooks, G.-Y. Wei, L. Carloni, P. Bose, K. Shepard
    A 400-ns-Settling-Time Hybrid Dynamic Voltage Frequency Scaling Architecture and Its Application in a 22-Core Network-on-Chip SoC in 12-nm FinFET Technology
    Symposium on VLSI Circuits, 2024.

  22. Y. Gilhotra, H. Overhauser, H. Yin, E. Pollmann, G. Eichler, A. Cheng, T. Jung, N. Zeng, L. P. Carloni, K. Shepard
    A Wireless Subdural Optical Cortical Interface Device with 768 Co-Packaged Micro-LEDs for Fluorescence Imaging and Optogenetic Stimulation
    The Proceedings of the Custom Integrated Circuits Conference (CICC), 2024.

  23. M. Cassel dos Santos, T. Jia, J. Zuckerman, M. Cochet, D. Giri, E. J. Loscalzo, K. Swaminathan, T. Tambe, J. J. Zhang, A. Buyuktosunoglu, K.-L. Chiu, G. Di Guglielmo, P. Mantovani, L. Piccolboni, G. Tombesi, D. Trilla, J-D. Wellman, E- Y. Yang, A. Amarnath, Y. Jing, B. Mishra, J. Park, V. Suresh, S. Adve, P. Bose, D. Brooks, L. P. Carloni, K.L. Shepard, and G.-Y. Wei.
    A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration.
    International Solid-State Circuits Conference (ISSCC), 2024.

    24. 2023

  24. K.-L. Chiu, D. Giri, L. Piccolboni, and L. P. Carloni
    An Analysis of Accelerator Data-Transfer Modes in NoC-Based SoC Architectures
    Proceedings of the Twenty-Seventh Annual Conference on High Performance Extreme Computing (HPEC), 2023. (HPEC Outstanding Student Paper Award).

  25. G. Eichler, B. Seyoum, K.-L. Chiu, and L. P. Carloni
    MindCrypt: The Brain as a Random Number Generator for SoC-Based Brain-Computer Interfaces
    The Proceedings of the International Conference on Computer Design (ICCD), 2023.

  26. G. Tombesi, J. Zuckerman, P. Mantovani, D. Giri, M. Cassel Dos Santos, T. Jia, David Brooks, G.-Y. Wei and L. P. Carloni
    SoCProbe: Compositional Post-Silicon Validation of Heterogeneous NoC-Based SoCs
    Proceedings of the 17th International Symposium on Networks-on-Chip (NOCS), 2023. (Best Paper Award).

  27. J. Clair, G. Eichler and L. P. Carloni
    SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip
    Presented at the International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2023.
    ACM Transactions on Embedded Computing Systems, Vol. 22, No. 5, September 2023.

  28. B. Stitic, L. Urbinati, G. Di Guglielmo, L. Carloni, and M. R. Casu
    Enhanced Machine-Learning Flow for Microwave-Sensing Systems to Detect Contaminants in Food
    IEEE Conference on AgriFood Electronics (CAFE), 2023. (Best Student Paper Award).

  29. N. Zeng, T. Jung, M. Sharma, G. Eichler, J. Fabbri, R. J. Cotton, E. Spinazzi, B. Youngerman, L. Carloni, and K. L. Shepard
    A Wireless, Mechanically Flexible, 25µm-Thick, 65,536-Channel Subdural Surface Recording and Stimulating Microelectrode Array with Integrated Antennas
    Symposium on VLSI Circuits, 2023.

  30. F. Gao, T.-J. Chang, A. Li, M. Orenes-Vera, D. Giri, P. Jackson, A. Ning, G. Tziantzioulis, J. Zuckerman, J. Tu, K. Xu, G. Chirkov, G. Tombesi, J. Balkind, M. Martonosi, L. Carloni, D. Wentzlaff
    DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET
    The Proceedings of the Custom Integrated Circuits Conference (CICC), 2023.

  31. K.-L. Chiu, G. Eichler, B. Seyoum, and L. P. Carloni
    EigenEdge: Real-Time Software Execution at the Edge with RISC-V and Hardware Accelerators
    The Proceedings of the Real-time And intelliGent Edge Computing Workshop (RAGE), 2023.

  32. B. Seyoum, D. Giri, K.-L. Chiu, B. Natter and L. P. Carloni
    PR-ESP: An Open-Source Platform for Design and Programming of Partially Reconfigurable SoCs
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2023.

  33. T. Tambe, J. Zhang, C. Hooper, T. Jia, P. N. Whatmough, J. Zuckerman, M. Cassel Dos Santos, E. J. Loscalzo, D. Giri, K. Shepard, L. Carloni, A. Rush, D. Brooks, G-Y. Wei
    A 12nm 18.1TFLOPs/W Sparse Transformer Processor with Entropy-Based Early Exit, Mixed-Precision Predication and Fine-Grained Power Management
    International Solid-State Circuits Conference (ISSCC), 2023.

    34. 2022

  34. M. Cassel dos Santos, T. Jia, M. Cochet, K. Swaminathan, J. Zuckerman, P. Mantovani, D. Giri, J. J. Zhang, E. J. Loscalzo, G. Tombesi, K. Tien, N. Chandramoorthy, J.-D. Wellman, D. Brooks, G.-Y. Wei, K. Shepard, L. P. Carloni, and P. Bose
    (Invited Paper). A Scalable Methodology for Agile Chip Development with Open-Source Hardware Components
    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 2022.

  35. T, Jia, P. Mantovani, M. Cassel dos Santos, D. Giri, J. Zuckerman, E. J. Loscalzo, M. Cochet, K. Swaminathan, G. Tombesi, J. J. Zhang, N. Chandramoorthy, J.-D. Wellman, K. Tien, L. P. Carloni, K. Shepard, D. Brooks, G.-Y, Wei, and P. Bose
    "A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC
    Proceedings of the 48th European Solid-State Circuits Conference (ESSCIRC), 2022.

  36. M. M. Ziegler, J. Kwon, H.-Y. Liu, and L. P. Carloni
    The Interplay of Online and Offline Machine Learning for Design Flow Tuning
    In H.Ren, J.Hu(eds.), Machine Learning Applications in Electronic Design Automation, Springer. 2022.

  37. L. Piccolboni, D. Giri, and L. P. Carloni
    Accelerators & Security: The Socket Approach
    Computer Architecture Letters, Vol. 21, No. 2, July-December 2022.

  38. B. Seyoum, D. Giri, K.-L. Chiu, and L. P. Carloni
    An Open-source Platform for Design and Programming of Partially Reconfigurable Heterogeneous SoCs
    International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2022.

  39. D. Xu, A. B. Ozguler, G. Di Guglielmo, N. Tran, G. N. Perdue, L. Carloni, and F. Fahim
    Neural network accelerator for quantum control
    IEEE/ACM Third International Workshop on Quantum Computing Software (QCS), 2022

  40. J. Zuckerman, P. Mantovani, D. Giri, and L. P. Carloni
    Enabling Heterogeneous, Multicore SoC Research with RISC-V and ESP
    The Proceedings of the Workshop on Computer Architecture Research with RISC-V (CARRV), 2022.

  41. Y.-J. Jwa, G. Di Guglielmo, L. Arnold, L. P. Carloni and G. Karagiorgi
    Real-time Inference with 2D Convolutional Neural Networks on Field Programmable Gate Arrays for High-Rate Particle Imaging Detectors
    Frontiers in Artificial Intelligence, section Big Data and AI in High Energy Physics, 2022.

    42. 2021

  42. L. Ferretti, J. Kwon, G. Ansaloni, G. Di Guglielmo, L. P. Carloni, and L. Pozzi
    DB4HLS: A Database of High-Level Synthesis Design Space Explorations
    Embedded Systems Letters, Vol. 13, No. 4, December 2021.

  43. G. Eichler, L. Piccolboni, D. Giri and L. P. Carloni
    MasterMind: Many-Accelerator SoC Architecture for Real-Time Brain-Computer Interfaces
    The Proceedings of the International Conference on Computer Design (ICCD), 2021.

  44. J. Zuckerman, D. Giri, J. Kwon, P. Mantovani, and L. P. Carloni
    Cohmeleon: Learning-Based Orchestration of Accelerator Coherence in Heterogeneous SoCs
    IEEE/ACM International Symposium on Microarchitecture (MICRO-54), 2021.

  45. M. M. Ziegler, J. Kwon, H.-Y. Liu, and L. P. Carloni
    (Invited Paper). Online and Offline Machine Learning for Industrial Design Flow Tuning
    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 2021.

  46. S. Chattopadhyay, F. Lonsing, L. Piccolboni, D. Soni, P. Wei, X. Zhang, Y. Zhou, L. Carloni, D. Chen, J. Cong, R. Karri, Z. Zhang, C. Trippel, C. Barrett and S. Mitra
    Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition
    Formal Methods in Computer-Aided Design, 2021.

  47. L. Piccolboni, G. Di Guglielmo, S. Sethumadhavan and L. P. Carloni
    HARDROID: Transparent Integration of Crypto Accelerators in Android
    Proceedings of the Twenty-Fifth Annual Conference on High Performance Extreme Computing (HPEC), 2021.

  48. M. Ricci, B. Stitic, L. Urbinati, G. Di Guglielmo, J. A. Tobon Vasquez, L. P. Carloni, F. Vipiana, and M. R. Casu
    Machine-Learning Based Microwave Sensing: A Case Study for the Food Industry
    IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol 11, No. 3, September 2021.

  49. D. Giri, K.-L. Chiu, G. Eichler, P. Mantovani, and L. P. Carloni
    Accelerator Integration for Open-Source SoC Design
    IEEE Micro Special Issue: FPGAs in Computing, Vol. 41, No. 4, July-August 2021.

  50. L. Piccolboni, G. Di Guglielmo, L. P. Carloni and S. Sethumadhavan
    CRYLOGGER: Detecting Crypto Misuses Dynamically
    IEEE Symposium on Security and Privacy ("Oakland"), 2021.

  51. F. Fahim, B. Hawks, C. Herwig, J. Hirschauer, S. Jindariani, N. Tran, L. P. Carloni, G. Di Guglielmo, P. Harris, J. Krupa, D. Rankin, M. Blanco Valentin, J. Hester, Y. Luo, J. Mamish, S. Orgrenci-Memik, T. Aarestaad, H. Javed, V. Loncar, M. Pierini, A. A. Pol, S. Summers, J. Duarte, S. Hauck, S.-C. Hsu, J. Ngadiuba, M. Liu, D. Hoang, E. Kreinar, Z. Wu
    hls4ml: An Open-Source Codesign Workflow to Empower Scientific Low-Power Machine Learning Devices
    Proceedings of the TinyML Research Symposium 2021.

    52. 2020

  52. J. Kwon and L. P. Carloni
    Transfer Learning for Design-Space Exploration with High-Level Synthesis
    ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), 2020. (Best Paper Award).

  53. P. Mantovani, D. Giri, G. Di Guglielmo, L. Piccolboni, J. Zuckerman, E. G. Cota, M. Petracca, C. Pilato, and L. P. Carloni
    Agile SoC Development with Open ESP
    (Invited Paper). The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 2020.

  54. L. P. Carloni
    Scalable Open-Source System-on-Chip Design
    (Invited Talk - Extended Abstract)
    28th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2020.

  55. L. Ferretti, J. Kwon, G. Ansaloni, G. Di Guglielmo, L. P. Carloni and L. Pozzi
    Leveraging Prior Knowledge for Effective Design-Space Exploration in High-Level Synthesis
    Presented at the International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2020.
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 39, No. 11, November 2020.

  56. M. Hattink, G. Di Guglielmo, L. P. Carloni and K. Bergman
    A Scalable Architecture for CNN Accelerators Leveraging High-Performance Memories
    Proceedings of the Twenty-Fourth Annual Conference on High Performance Extreme Computing (HPEC), 2020.

  57. O. Matthews, J. L. Aragon, T. J. Ham, D. Giri, A. Manocha, T. Sorensen, M. Orenes Vera, E. Tureci, L. P. Carloni and M. Martonosi
    MosaicSim: A Lightweight, Modular Simulator for Heterogeneous Systems
    The Proceedings of the International Symposium on Performance Analysis of Systems and Software (ISPASS), 2020

  58. Q. Cheng, J. Kwon, M. Glick, M. Bahadori, L. P. Carloni and K. Bergman
    Silicon Photonics Codesign for Deep Learning
    The Proceedings of the IEEE, Vol. 108, No. 8, August 2020.

  59. D. Giri, K.-L. Chiu, G. Eichler, P. Mantovani, N. Chandramoorthy and L. P. Carloni
    Ariane + NVDLA: Seamless Third-Party IP Integration with ESP
    The Proceedings of the Workshop on Computer Architecture Research with RISC-V (CARRV), 2020.

  60. Z. Zhu, G. Di Guglielmo, Q. Cheng, M. Glick, J. Kwon, H. Guan, L. P. Carloni and K. Bergman
    Photonic Switched Optically Connected Memory: An Approach to Address Memory Challenges in Deep Learning
    (Invited Paper). IEEE/OSA Journal of Lightwave Technology, Vol. 38, No. 10, May 2020.

  61. P. Mantovani, R. Margelli, D. Giri and L. P. Carloni
    HL5: A 32-bit RISC-V Processor Designed with High-Level Synthesis
    The Proceedings of the Custom Integrated Circuits Conference (CICC), 2020

  62. D. Giri, K.-L. Chiu, G. Di Guglielmo, P. Mantovani, and L. P. Carloni
    ESP4ML: Platform-Based Design of Systems-on-Chip for Embedded Machine Learning
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2020.

    63. 2019

  63. L. Piccolboni, G. Di Guglielmo, and L. P. Carloni
    KAIROS: Incremental Verification in High-Level Synthesis through Latency-Insensitive Design
    Formal Methods in Computer-Aided Design (FMCAD), 2019

  64. G. Zacharopoulos, L. Ferretti, G. Ansaloni, G. Di Guglielmo, L. Carloni and L. Pozzi
    Compiler-Assisted Selection of Hardware Acceleration Candidates from Application Source Code
    The Proceedings of the International Conference on Computer Design (ICCD), 2019.

  65. K. Bhardwaj, P. Mantovani, L. P. Carloni and S. M. Nowick
    Towards a Complete Methodology for Synthesizing Bundled-Data Asynchronous Circuits on FPGAs
    The Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2019.

  66. Y.-J. Jwa, G. Di Guglielmo, L. P. Carloni and G. Karagiorgi
    Accelerating Deep Neural Networks for Real-time Data Selection for High-resolution Imaging Particle Detectors
    The Proceeding of the New York Scientific Data Summit (NYSDS), 2019.

  67. L. P. Carloni, E. Cota, G. Di Guglielmo, D. Giri, J. Kwon, P. Mantovani, L. Piccolboni, and M. Petracca
    Teaching Heterogeneous Computing with System-Level Design Methods
    Workshop on Computer Architecture Education (WCAE), 2019.

  68. J. Kwon, M. M. Ziegler and L. P. Carloni
    A Learning-Based Recommender System for Autotuning Design Flows of Industrial High-Performance Processors
    The Proceedings of the Design Automation Conference (DAC), 2019.

  69. L. Piccolboni, G. Di Guglielmo, and L. P. Carloni
    Securing Accelerators with Dynamic Information Flow Tracking
    Hardware Demo presented at the IEEE International Symposium on Hardware Oriented Security and Trust (HOST), 2019.

  70. E. G. Cota and L. P. Carloni
    Cross-ISA Machine Instrumentation Using Fast and Scalable Dynamic Binary Translation
    ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments (VEE), 2019.

  71. D. Giri, P. Mantovani and L. P. Carloni
    Runtime Reconfigurable Memory Hierarchy in Embedded Scalable Platforms
    (Invited Paper). Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2019.

    72. 2018

  72. D. Giri, P. Mantovani and L. P. Carloni
    Accelerators & Coherence: An SoC Perspective
    IEEE Micro Special Issue: Hardware Acceleration, Vol. 38, No. 6, November/December 2018.

  73. D. Giri, P. Mantovani and L. P. Carloni
    NoC-Based Support of Heterogeneous Cache-Coherence Models for Accelerators
    Proceedings of the Twelfth International Symposium on Networks-on-Chip (NOCS), 2018.

  74. L. Piccolboni, G. Di Guglielmo, and L. P. Carloni
    PAGURUS: Low-Overhead Dynamic Information Flow Tracking on Loosely-Coupled Accelerators
    Presented at the International Conference on Hardware/Software Codesign & System Synthesis (CODES+ISSS), 2018.
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 37, No. 11, November 2018.

  75. C. Palmiero, G. Di Guglielmo, L. Lavagno and L. P. Carloni
    Design and Implementation of a Dynamic Information Flow Tracking Architecture to Secure a RISC-V Core for IoT Applications
    Proceedings of the Twenty-Second Annual Conference on High Performance Extreme Computing (HPEC), 2018.

  76. C. Pilato and L. P. Carloni
    DarkMem: Fine-Grained Power Management of Local Memories for Accelerators in Embedded Systems
    Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2018.

    77. 2017

  77. L. Piccolboni, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    COSMOS: Coordination of High-Level Synthesis and Memory Optimization for Hardware Accelerators
    Presented at the International Conference on Hardware/Software Codesign & System Synthesis (CODES+ISSS), 2017.
    ACM Transactions on Embedded Computing Systems, Vol. 16, No. 5s, September 2017.

  78. Y.J. Yoon, P. Mantovani and L. P. Carloni
    System-Level Design of Networks-on-Chip for Systems-on-Chip
    (Invited Paper). Proceedings of the Eleventh International Symposium on Networks-on-Chip (NOCS), 2017.

  79. L. Piccolboni, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    Broadening the Exploration of the Accelerator Design Space in Embedded Scalable Platforms
    Proceedings of the Twenty-First Annual Conference on High Performance Extreme Computing (HPEC), 2017.

  80. E. G. Cota, P. Bonzini, A. Bennée, and L. P. Carloni
    Cross-ISA Machine Emulation for Multicores
    The Proceedings of the International Symposium on Code Generationand Optimization (CGO), 2017.

  81. D. Jahier Pagliari, M. R. Casu, and L. P. Carloni
    Accelerators for Breast-Cancer Detection
    ACM Transactions on Embedded Computing Systems, Vol. 16, No. 3, March 2017.

  82. C. Pilato, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    System-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 36, No. 3, March 2017.

    83. 2016

  83. P. Mantovani, E. Cota, C. Pilato, G. Di Guglielmo and L. P. Carloni
    Handling Large Data Sets for High-Performance Embedded Applications in Heterogeneous Systems-on-Chip
    The Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2016.

  84. M. M. Ziegler, H.-Y. Liu, and L. P. Carloni
    Scalable Auto-Tuning of Synthesis Parameters for Optimizing High-Performance Processors
    The Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2016.

  85. L. P. Carloni
    The Case for Embedded Scalable Platforms
    (Invited Paper). The Proceedings of the Design Automation Conference (DAC), 2016.

  86. P. Mantovani, E. Cota, K. Tien, C. Pilato, G. Di Guglielmo, K. Shepard and L. P. Carloni
    An FPGA-Based Infrastructure for Fine-Grained DVFS Analysis in High-Performance Embedded Systems
    The Proceedings of the Design Automation Conference (DAC), 2016.

  87. E. G. Cota, P. Mantovani, and L. P. Carloni
    Exploiting Private Local Memories to Reduce the Opportunity Cost of Accelerator Integration
    The Proceedings of the International Conference on Supercomputing (ICS), 2016.

  88. Y. Jung, J. Koo, K. Stratos, and L. P. Carloni
    A Probabilistic Ranking Model for Audio Stream Retrieval
    International Workshop on Multimedia Analysis and Retrieval for Multimodal Interaction (MARMI), 2016.

  89. C. Pilato, Q. Xu, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    On the Design of Scalable and Reusable Accelerators for Big Data Applications
    (Invited Paper). Workshop on Big Data Analytics, co-located with ACM International Conference on Computing Frontiers (CF), 2016.

  90. M. M. Ziegler, H.-Y. Liu, G. Gristede, B. Owens, R. Nigaglioni, and L. P. Carloni
    A Synthesis-Parameter Tuning System for Autonomous Design-Space Exploration
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2016.

  91. P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    High-Level Synthesis of Accelerators in Embedded Scalable Platforms
    (Invited Paper). Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2016.

    92. 2015

  92. L. P. Carloni
    From Latency-Insensitive Design to Communication-Based System-Level Design
    The Proceedings of the IEEE, Vol. 103, No. 11, November 2015.

  93. R. K. Brayton, L. P. Carloni, A.L. Sangiovanni-Vincentelli, and T. Villa
    Design Automation of Electronic Systems: Past Accomplishments and Challenges Ahead [Scanning the Issue]
    The Proceedings of the IEEE, Vol. 103, No. 11, November 2015.

  94. R. Margolies, M. Gorlatova, J. Sarik, G. Stanje, J. Zhu, P. Miller, M. Szczodrak, B. Vigraham, L. Carloni, P. R. Kinget, I. Kymissis, and G. Zussman
    Energy Harvesting Active Networked Tags (EnHANTs): Prototyping and Experimentation
    ACM Transactions on Sensor Networks, Vol. 11, No. 4, November 2015.

  95. D. Jahier Pagliari, A. Pulimeno, J. A. Tobon, M. Vacca, F. Vipiana, M. R. Casu, R. Solimene, and L. P. Carloni
    A Low-Cost, Fast, and Accurate Microwave Imaging System for Breast Cancer Detection
    Biomedical Circuits and Systems Conference (BioCAS), 2015.

  96. D. Jahier Pagliari, M. R. Casu, and L. P. Carloni
    Acceleration of Microwave Imaging Algorithms for Breast Cancer Detection via High-Level Synthesis
    The Proceedings of the International Conference on Computer Design (ICCD), 2015.

  97. K. Tien, N. Sturcken, N. Wang, J.-W. Nah, B. Dang, E. O'Sullivan, P. Andry, M. Petracca, L. P. Carloni, W. Gallagher, and K. Shepard
    An 82%-Efficient Multiphase Voltage-Regulator 3D Interposer with On-Chip Magnetic Inductors
    Symposium on VLSI Circuits, 2015.

  98. E. G. Cota, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    An Analysis of Accelerator Coupling in Heterogeneous Architectures
    The Proceedings of the Design Automation Conference (DAC), 2015.

  99. Y. Jung and L. P. Carloni
    ΣVP: Host-GPU Multiplexing for Efficient Simulation of Multiple Embedded GPUs on Virtual Platforms
    The Proceedings of the Design Automation Conference (DAC), 2015.

  100. Y. Jung, K. Stratos, and L. P. Carloni
    LN-Annote: An Alternative Approach to Information Extraction from Emails using Locally-Customized Named-Entity Recognition
    The Proceedings of the International World Wide Web Conference (WWW), 2015.

    101. 2014

  101. J. Brooks, S. Goyal, R. Subramany, Y. Lin, T. Middelkoop, L. Arpan, L. Carloni, and P. Barooah
    An Experimental Investigation of Occupancy-Based Energy-Efficient Control of Commercial Building Indoor Climate
    IEEE Conference on Decision and Control (CDC), 2014

  102. C. Pilato, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    System-Level Memory Optimization for High-Level Synthesis of Component-Based SoCs
    The Proceedings of the International Conference on Hardware/Software Codesign & System Synthesis (CODES+ISSS), 2014.

  103. Y. Jung, M. Petracca, and L. P. Carloni
    Cloud-Aided Design for Distributed Embedded Systems
    IEEE Design & Test, Vol. 31, No. 4, July/August 2014.

  104. G. Di Guglielmo, C. Pilato, and L. P. Carloni
    A Design Methodology for Compositional High-Level Synthesis of Communication-Centric SoCs
    The Proceedings of the Design Automation Conference (DAC), 2014.

  105. E. G. Cota, P. Mantovani, M. Petracca, M. R. Casu and L. P. Carloni
    Accelerator Memory Reuse in the Dark Silicon Era
    Computer Architecture Letters, Vol. 31, No. 1, January/June 2014.

    106. 2013

  106. Y.J. Yoon, N. Concer, M. Petracca and L. P. Carloni
    Virtual Channels and Multiple Physical Networks: Two Alternatives to Improve NoC Performance
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 32, No. 12, December 2013.

  107. R. Collins and L.P. Carloni
    Flexible Filters in Stream Programs
    ACM Transactions on Embedded Computing Systems, Vol. 13, No. 3, December 2013.

  108. M. Szczodrak, O. Gnawali, and L. P. Carloni
    Modeling and Implementation of Energy Neutral Sensing Systems
    The Proceedings of the 1st International Workshop on Energy Neutral Sensing Systems (ENSSyS), 2013.

  109. M. Szczodrak, Y. Yang, D. Cavalcanti, and L. P. Carloni
    An Open Framework to Deploy Heterogeneous Wireless Testbeds for Cyber-Physical Systems
    The Proceedings of the IEEE Symposium on Industrial Embedded Systems (SIES), 2013.

  110. Y. Jung, J. Park, M. Petracca, and L. P. Carloni
    netShip: A Networked Virtual Platform for Large-Scale Heterogeneous Distributed Embedded System
    The Proceedings of the Design Automation Conference (DAC), 2013.

  111. H.-Y. Liu and L.P. Carloni
    On Learning-Based Methods for Design-Space Exploration with High-Level Synthesis
    The Proceedings of the Design Automation Conference (DAC), 2013.

  112. N. Bombieri, H.-Y. Liu, F. Fummi, and L.P. Carloni
    A Method to Abstract RTL IP Blocks into C++ Code and Enable High-Level Synthesis
    The Proceedings of the Design Automation Conference (DAC), 2013.

  113. M. Szczodrak, O. Gnawali, and L. P. Carloni
    Dynamic Reconfiguration of Wireless Sensor Networks to Support Heterogeneous Applications
    The Proceedings of the IEEE International Conference on Distributed Computing in Sensor Systems (DCOSS), 2013.

  114. D. Whelihan, J. Hughes, S. Sawyer, E. Robinson, M. Wolf, S. Mohindra, J. Mullen, A. Klein, M. S. Beard, N. Bliss, J. Chan, R. Hendry, K. Bergman and L. Carloni
    P-sync: A Photonically Enabled Architecture for Efficient Non-Local Data Access
    IEEE International Parallel & Distributed Processing Symposium (IPDPS), 2013

  115. M. Gorlatova, R. Margolies, J. Sarik, G. Stanje, J. Zhu, B. Vigraham, M. Szczodrak, L. P. Carloni, P. R. Kinget, I. Kymissis, and G. Zussman
    Prototyping Energy Harvesting Active Networked Tags (EnHANTs)
    Proceedings of the IEEE INFOCOM Mini-Conference, 2013.

  116. M. Casale-Rossi and A. Sangiovanni-Vincentelli and L. Carloni and B. Courtois and H. de Man and A. Domic and J. Rabaey
    Panel: The Heritage of Mead & Conway
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2013.

  117. N. Sturcken, E. J. O'Sullivan, N. Wang, P. Herget, B. Webb, L. T. Romankiw, M. Petracca, R. Davies, R. Fontana, G. M. Decad, I. Kymissis, A. V. Peterchev, L.P. Carloni, W.J. Gallagher, and K.L. Shepard
    A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer
    IEEE Journal of Solid State Circuits, Vol. 48, No. 1, January 2013.

    118. 2012

  118. Y. Jung, R. Neill and L. P. Carloni
    A Broadband Embedded Computing System for MapReduce Utilizing Hadoop
    IEEE International Conference on Cloud Computing Technology and Science (CloudCom), 2012. (Best Paper Award).

  119. Y.J. Yoon, N. Concer and L. P. Carloni
    VENTTI: a Vertically Integrated Framework for Simulation and Optimization of Networks-On-Chip
    IEEE International System-on-Chip Conference, 2012.

  120. N. Sturcken, M. Petracca, S. Warren, P. Mantovani, L.P. Carloni, A.V. Peterchev, and K.L. Shepard
    A Switched-Inductor Integrated Voltage Regulator with Nonlinear Feedback and NoC Load in 45nm SOI
    IEEE Journal of Solid State Circuits, Vol. 47, No. 8, August 2012.

  121. L. Ramini, D. Bertozzi, and L. P. Carloni
    Engineering a Bandwidth-Scalable Optical Layer for a 3D Multi-Core Processor with Awareness of Layout Constraints
    Proceedings of the Sixth International Symposium on Networks-on-Chip (NOCS), 2012.

  122. H.-Y. Liu, M. Petracca, and L.P. Carloni
    Compositional System-Level Design Exploration with Planning of High-Level Synthesis
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2012. (Best Paper Award).

  123. N. Sturcken, E. J. O'Sullivan, N. Wang, P. Herget, B. Webb, L. T. Romankiw, M. Petracca, R. Davies, R. Fontana, G. M. Decad, I. Kymissis, A. V. Peterchev, L.P. Carloni, W.J. Gallagher, and K.L. Shepard
    A 2.5D Integrated Voltage Regulator Using Coupled Magnetic Core Inductors on Silicon Interposer Delivering 10.8A/mm2
    International Solid-State Circuits Conference (ISSCC), 2012.

    124. 2011

  124. G. Stanje, P. Miller, J. Zhu, A. Smith, O. Winn, R. Margolies, M. Gorlatova, J. Sarik, M. Szczodrak, B. Vigraham, L. P. Carloni, P. R. Kinget, I. Kymissis, and G. Zussman
    Demo: Organic Solar Cell-equipped Energy Harvesting Active Networked Tag (EnHANT) Prototypes
    Proceedings of the 5th International Conference on Embedded Networked Sensor Systems (SenSys), 2011. (Best Student Demo Award).

  125. M. Szczodrak and L. P. Carloni
    Demo: A Complete Framework for Programming Event-Driven, Self-Reconfigurable Low Power Wireless Networks
    Proceedings of the 5th International Conference on Embedded Networked Sensor Systems (SenSys), 2011.

  126. J. Chan, G. Hendry, K. Bergman, and L. P. Carloni
    Physical-Layer Modeling and System-Level Design of Chip-Scale Photonic Interconnection Networks
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 30, No. 10, October 2011.

  127. N. Concer, A. Vesco, R. Scopigno, and L.P. Carloni
    A Dynamic and Distributed TDM Slot-Scheduling Protocol for QoS-Oriented Networks-on-Chip
    The Proceedings of the International Conference on Computer Design (ICCD), 2011.

  128. R. Neill, L. P. Carloni, A. Shabarshin, V. Sigaev, and S. Tcherepanov
    Embedded Processor Virtualization for Broadband Grid Computing
    The Proceedings of the 12th IEEE/ACM International Conference on Grid Computing (Grid), 2011.

  129. N. Sturcken, M. Petracca, S. Warren, L.P. Carloni, A.V. Peterchev, and K.L. Shepard
    An Integrated Four-Phase Buck Converter Delivering 1A/mm2 with 700ps Controller Delay and Network-on-Chip Load in 45-nm SOI
    The Proceedings of the Custom Integrated Circuits Conference (CICC), 2011.

  130. H.-Y. Liu, I. Diakonikolas, M. Petracca, and L.P. Carloni
    Supervised Design Space Exploration by Compositional Approximation of Pareto Sets
    The Proceedings of the Design Automation Conference (DAC), 2011.

  131. J. Zhu, G. Stanje, R. Margolies, M. Gorlatova, J. Sarik, Z. Noorbhaiwala, P. Miller, M. Szczodrak, B. Vigraham, L. P. Carloni, P. R. Kinget, I. Kymissis, and G. Zussman
    Demo: Prototyping UWB-Enabled EnHANTS    .
    Proceedings of the International Conference on Mobile Systems, Applications, and Services (MobiSys), 2011

  132. G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman
    Time-Division-Multiplexed Arbitration in Silicon Nanophotonic Networks-On-Chip for High-Performance Chip Multiprocessors
    Journal of Parallel and Distributed Computing, Vol. 71, No. 5, May 2011.

  133. F. Leonardi, A. Pinto, and L.P. Carloni
    Synthesis of Distributed Execution Platforms for Cyber-Physical Systems with Applications to High-Performance Buildings
    The Proceedings of the ACM/IEEE Second International Conference on Cyber-Physical Systems (ICCPS), 2011.

  134. G. Hendry, J. Chan, L. P. Carloni, and K. Bergman
    VANDAL: A Tool for the Design Specification of Nanophotonic Networks
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2011.

    135. 2010

  135. G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman
    Circuit-Switched Memory Access in Photonic Interconnection Networks for High-Performance Embedded Computing
    The Proceedings of the ACM/IEEE Conference on High Performance Computing (SC), 2010.

  136. R. Collins and L. P. Carloni
    Flexible Filters for High-Performance Embedded Computing
    Proceedings of the Fourteenth Annual Workshop on High Performance Embedded Computing (HPEC), 2010.

  137. G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. P. Carloni and K. Bergman
    Silicon Nanophotonic Network-On-Chip using TDM Arbitration
    18th Annual IEEE Symposium on High-Performance Interconnects (HotI), 2010.

  138. Y.J. Yoon, N. Concer, M. Petracca, and L. P. Carloni
    Virtual Channels vs. Multiple Physical Networks: A Comparative Analysis
    The Proceedings of the Design Automation Conference (DAC), 2010.

  139. N. Concer, L. Bononi, M. Soulie, R. Locatelli, and L.P. Carloni
    The Connection-then-Credit Flow Control Protocol for Heterogeneous Multi-Core Systems-on-Chip
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 29, No. 6, June 2010.

  140. R. Neill, A. Shabarshin, and L. P. Carloni
    A Heterogeneous Parallel System Running Open MPI on a Broadband Network of Embedded Set-Top Devices
    ACM International Conference on Computing Frontiers (CF), 2010.

  141. L. P. Carloni, A. B. Kahng., S. Muddu. A. Pinto, K. Samadi, and P. Sharma
    Accurate Predictive Interconnect Modeling for System-Level Design
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 18, No. 4, April 2010.

  142. C.-H. Li, S. Sonalkar, and L.P. Carloni
    Exploiting Local Logic Structures to Optimize Multi-Core SoC Floorplanning
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2010.

  143. R. Collins, B. Vellore, and L.P. Carloni
    Recursion-Driven Parallel Code Generation for Multi-Core Platforms
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2010.

  144. J. Chan, G. Hendry, A. Biberman, K. Bergman and L.P. Carloni
    PhoenixSim: A Simulator for Physical-Layer Analysis of Chip-Scale Photonic Interconnection Networks
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2010.

    145. 2009

  145. R. Collins and L.P. Carloni
    Flexible Filters: Load Balancing through Backpressure for Stream Programs
    Proceedings of the Ninth International Conference on Embedded Software (EMSOFT), 2009.

  146. M. Petracca, B. G. Lee, K. Bergman and L.P. Carloni
    Photonic NoCs: System-Level Design Exploration
    IEEE Micro Special Issue: Top Picks from Hot Interconnects 16, Vol. 29, No. 4, July/August 2009.

  147. N. Concer, L. Bononi, M. Soulie, R. Locatelli and L.P. Carloni
    CTC: An End-To-End Flow Control Protocol for Multi-Core Systems-on-Chip
    Proceedings of the Third International Symposium on Networks-on-Chip (NOCS), 2009.

  148. G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L.P. Carloni, J. Kubiatowicz, L. Oliker and J. Shalf
    Analysis of Photonic Networks for a Chip Multi-Processor Using Scientific Applications
    Proceedings of the Third International Symposium on Networks-on-Chip (NOCS), 2009.

  149. L.P. Carloni, P. Pande and Y. Xie
    Networks-on-Chip in Emerging Interconnect Paradigms: Advantages and Challenges
    Proceedings of the Third International Symposium on Networks-on-Chip (NOCS), 2009.

  150. F. Leonardi, A. Pinto, and L.P. Carloni
    A Case Study in Distributed Deployment of Embedded Software for Camera Networks
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2009.

  151. A. Pinto, L.P. Carloni, and A. Sangiovanni-Vincentelli
    A Methodology for Constraint-Driven Synthesis of On-Chip Communications
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 28, No. 3, March 2009.

  152. C.-H. Li and L.P. Carloni
    Leveraging Local Intra-Core Information to Increase Global Performance in Block-Based Design of Systems-on-Chip
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 28, No. 2, February 2009.

    153. 2008

  153. R.L. Collins and L.P. Carloni
    Topology-Based Performance Analysis and Optimization of Latency-Insensitive Systems
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 27, No. 12, December 2008.

  154. N. Concer, M. Petracca, and L.P. Carloni
    Distributed Flit-Buffer Flow Control for Networks-on-Chip
    The Proceedings of the Sixth International Conference on Hardware/Software Codesign & System Synthesis (CODES+ISSS), 2008.

  155. A. Shacham, K. Bergman, and L.P. Carloni
    Photonic Networks-on-Chip for Future Generations of Chip Multi-Processors
    IEEE Transactions on Computers, Vol. 57, No. 9, September 2008.

  156. A. Pinto, L.P. Carloni, and A. Sangiovanni-Vincentelli
    COSI: A Framework for the Design of Interconnection Networks
    IEEE Design & Test of Computers. Vol. 25, No. 5, September/October 2008.

  157. N. Bliss, K. Asanovic, K. Bergman, L. Carloni, J. Kepner, and V. Stojanovic
    Photonic Many-Core Architecture Study
    Proceedings of the Twelfth Annual Workshop on High Performance Embedded Computing (HPEC), 2008.

  158. M. Petracca, B. G. Lee, K. Bergman and L.P. Carloni
    Design Exploration of Optical Interconnection Networks for Chip Multiprocessors
    16th Annual IEEE Symposium on High-Performance Interconnects (HotI), 2008.

  159. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Composing Heterogeneous Reactive Systems
    ACM Transactions on Embedded Computing Systems, Vol. 7, No. 4, July 2008.

  160. C. Pinello, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Fault-Tolerant Distributed Deployment of Embedded Control Software
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 27, No. 5, May 2008.

  161. M. Petracca, K. Bergman and L.P. Carloni
    Photonic Networks-on-Chip: Opportunities and Challenges
    (Invited Paper). Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), 2008.

  162. H. Wang, M. Petracca, A. Biberman, B. G. Lee, L.P. Carloni and K. Bergman
    Nanophotonic Optical Interconnection Network Architecture for On-Chip and Off-Chip Communications
    Proceedings of the Optical Fiber Communication / National Fiber Optic Engineers Conference (OFC/NFOEC), 2008.

  163. L. P. Carloni, A. B. Kahng., S. Muddu. A. Pinto, K. Samadi, and P. Sharma
    Interconnect Modeling for Improved System-Level Design Optimization
    Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2008.

    164. 2007

  164. C.-H. Li and L.P. Carloni
    Using Functional Independence Conditions to Optimize the Performance of Latency-Insensitive Systems
    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 2007.

  165. A. Pinto, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    A Communication Synthesis Infrastructure for Heterogeneous Networked Control Systems and its Application to Building Automation and Control
    Proceedings of the Seventh International Conference on Embedded Software (EMSOFT), 2007.

  166. K. Bergman and L.P. Carloni
    On-Chip Photonic Communication for High-Performance Multi-Core Processors
    Proceedings of the Eleventh Annual Workshop on High Performance Embedded Computing (HPEC), 2007. (Best Paper Award).

  167. A. Shacham, B. G. Lee, A. Biberman, K. Bergman and L.P. Carloni
    Photonic NoC for DMA Communications in Chip Multiprocessors
    15th Annual IEEE Symposium on High-Performance Interconnects (HotI), 2007.

  168. R. Collins and L. P. Carloni
    Topology-Based Optimization of Maximal Sustainable Throughput in a Latency-Insensitive System
    The Proceedings of the Design Automation Conference (DAC), 2007.

  169. A. Shacham, K. Bergman, and L. P. Carloni
    The Case for Low-Power Photonic Networks on Chip
    The Proceedings of the Design Automation Conference (DAC), 2007.

  170. C.-H. Li, R. Collins, S. Sonalkar and L. P. Carloni
    Design, Implementation, and Validation of a New Class of Interface Circuits for Latency-Insensitive Design
    Fifth ACM-IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE), 2007.

  171. A. Shacham, K. Bergman, and L. P. Carloni
    On the Design of a Photonic Network-on-Chip
    Proceedings of the First International Symposium on Networks-on-Chip (NOCS), 2007.

    172. 2006

  172. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, A.L. Sangiovanni-Vincentelli, and S. Tripakis
    Communication by Sampling in Time-Sensitive Distributed Systems
    Proceedings of the Sixth International Conference on Embedded Software (EMSOFT), 2006.

  173. A. Shacham, K. Bergman, and L. P. Carloni
    Maximizing GFLOPS-per-Watt: High-Bandwidth, Low Power Photonic On-Chip Networks
    Proceedings of the Third Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=ac^2), 2006.

  174. A. Bonivento, L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Platform Based Design for Wireless Sensor Networks.
    in Mobile Networks & Applications, Vol. 11, No. 4, August 2006

  175. L.P. Carloni, R. Passerone, A. Pinto and A.L. Sangiovanni-Vincentelli
    Languages and Tools for Hybrid Systems Design
    in Foundations and Trends. in Electronic Design Automation, Vol. 1, No. 1/2, Jul 2006.

  176. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    A Framework for Modeling the Distributed Deployment of Synchronous Designs
    in Formal Methods in Systems Design - An International Journal, © Springer-Verlag, Vol. 28, No. 2, March 2006

  177. A. Pinto, L. P. Carloni, R. Passerone, and A. Sangiovanni-Vincentelli
    Interchange Formats for Hybrid Systems: Abstract Semantics
    Proceedings of the Ninth International Workshop on Hybrid Systems : Computation and Control (HSCC), LNCS 3927, © Springer-Verlag, 2006.

  178. A. Bonivento, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Platform-Based Design of Wireless Sensor Networks for Industrial Applications
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2006.

  179. A. Pinto, L. P. Carloni, R. Passerone, and A. Sangiovanni-Vincentelli
    Interchange Semantics for for Hybrid System Models
    Proceedings of the Fifth MATHMOD, Vienna 2006.

  180. L.P. Carloni
    The Role of Back-Pressure in Implementing Latency-Insensitive Systems
    Electronic Notes in Theoretical Computer Science ENTCS 146-2, Vol. 146, No. 2, January 2006

    181. 2005

  181. A. Benveniste, B. Caillaud, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Tag Machines
    Proceedings of the Fifth International Conference on Embedded Software (EMSOFT), 2005

  182. A. Bonivento, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Rialto: a Bridge between Description and Implementation of Control Algorithms for Wireless Sensor Networks
    Proceedings of the Fifth International Conference on Embedded Software (EMSOFT), 2005

  183. L.P. Carloni, F. De Bernardinis, C. Pinello, A.L. Sangiovanni-Vincentelli, and M. Sgroi
    Platform-Based Design for Embedded Systems
    In R. Zurawski (Ed.), "The Embedded Systems Handbook", CRC Press , 2005

  184. A. Pinto, A. Sangiovanni-Vincentelli, L. P. Carloni, and R. Passerone
    Interchange Formats for Hybrid Systems: Review and Proposal
    Proceedings of the Eight International Workshop on Hybrid Systems : Computation and Control (HSCC), 2005. LNCS 3414, © Springer-Verlag, 2005

    185. 2004

  185. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Heterogeneous Reactive Systems Modeling: Capturing Causality and the Correctness of Loosely Time-Triggered Architectures (LTTA)
    Proceedings of the Fourth International Conference on Embedded Software (EMSOFT), 2004

  186. A.L. Sangiovanni-Vincentelli, L.P. Carloni, F. De Bernardinis, and M. Sgroi
    Benefits and Challenges of Platform-Based Design
    (Invited Paper). The Proceedings of the Design Automation Conference (DAC), 2004.

  187. C. Pinello, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Fault-Tolerant Deployment of Embedded Software for Cost-Sensitive Real-Time Feedback-Control Applications
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2004.

  188. L.P. Carloni, F. De Bernardinis, A.L. Sangiovanni-Vincentelli, and M. Sgroi
    Platform-Based and Derivative Design
    In R. Zurawski (Ed.), "The Industrial Information Technology Handbook", CRC Press , 2004

  189. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Causality and Scheduling Constraints in Heterogeneous Reactive Systems Modeling
    Proceedings of the Second International Symposium (FMCO'03), LNCS 3188, © Springer-Verlag, 2004

    190. 2003

  190. A. Benveniste, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Heterogeneous Reactive Systems Modeling and Correct-by-Construction Deployment
    Proceedings of the Third International Conference on Embedded Software (EMSOFT), LNCS 2855, © Springer-Verlag, 2003

  191. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    On-Chip Communication Design: Roadblocks and Avenues
    (Invited Talk - Extended Abstract)
    The Proceedings of the First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis (CODES+ISSS), 2003.

  192. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    A Formal Modeling Framework for Deploying Synchronous Designs on Distributed Architectures
    First International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Architectures (FMGALS), 2003.

  193. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits
    Proceedings of the 16th Symposium on Integrated Circuits and System Design (SBCCI), 2003.

  194. L.P. Carloni, K.L. McMillan, A. Saldanha, and A.L. Sangiovanni-Vincentelli
    A Methodology for Correct-by-Construction Latency-Insensitive Design
    Reprinted (first published in 1999) as selected paper in A. Kuehlmann (Ed.), "The Best of ICCAD - 20 Years of Excellence in Computer-Aided Design", Kluwer Academic Publishers, 2003.

  195. A. Pinto, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Efficient Synthesis of Networks On Chip
    The Proceedings of the International Conference on Computer Design (ICCD), 2003.

    196. 2002

  196. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Coping with Latency in SOC Design
    IEEE Micro, Special Issue on Systems on Chip. Vol. 22, No. 5, Sep/Oct 2002.

  197. L.P. Carloni, F. De Bernardinis, A.L. Sangiovanni-Vincentelli, and M. Sgroi
    The Art and Science of Integrated Systems Design
    (Invited Paper). In The Proceedings of the 28th European Solid-State Circuits Conference, 2002. Published also in The Proceedings of the 32th European Solid-State Device Research Conference, 2002.

  198. A. Pinto, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Constraint-Driven Communication Synthesis
    The Proceedings of the Design Automation Conference (DAC), 2002.

    199. 2001

  199. L.P. Carloni, K.L. McMillan, and A.L. Sangiovanni-Vincentelli
    Theory of Latency-Insensitive Design
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 20, No. 9, September 2001.

  200. S. Zanella, A. Neviani, E. Zanoni, E. Charbon, P. Miliozzi, C. Guardiani, L.P. Carloni, and A. L. Sangiovanni-Vincentelli
    Modeling of Substrate Noise Injected by Digital Libraries
    Proc. Int. Symp. Quality Electronic Design, San Jose, CA, March 2001.

    201. 2000

  201. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Performance Analysis and Optimization of Latency-Insensitive Systems
    The Proceedings of the Design Automation Conference (DAC), 2000.

  202. E.I. Goldberg, L.P. Carloni, T. Villa, R. K. Brayton, and A.L. Sangiovanni-Vincentelli
    Negative Thinking in Branch-and-Bound: the Case of Unate Covering
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 19, No. 3, March 2000.

    203. 1999

  203. E. Charbon, P. Miliozzi, L.P. Carloni, A. Ferrari, and A.L. Sangiovanni-Vincentelli
    Modeling Digital Substrate Noise Injection in Mixed-Signal ICs
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 18, No. 3, March 1999.

  204. L.P. Carloni, E.I. Goldberg, T. Villa, R.K. Brayton, and A.L. Sangiovanni-Vincentelli
    Aura II: Combining Negative Thinking and Branch-and-Bound in Unate Covering Problems
    In "VLSI: Systems on a Chip" (L.M. Silveira, R. Reis, S. Devadas editors), Kluwer 1999.

  205. L.P. Carloni, K.L. McMillan, A. Saldanha, and A.L. Sangiovanni-Vincentelli
    A Methodology for Correct-by-Construction Latency-Insensitive Design
    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 1999.

  206. L.P. Carloni, K.L. McMillan, and A.L. Sangiovanni-Vincentelli
    Latency-Insensitive Protocols
    In N. Halbwachs and D. Peled, editors, Proc. of the 11th Intl. Conf. on Computer-Aided Verification (CAV), LNCS 1633, © Springer-Verlag, 1999

    207. 1998

  207. A.L. Oliveira, L.P. Carloni, T. Villa, and A.L. Sangiovanni-Vincentelli
    Exact Minimization of Binary Decision Diagrams Using Implicit Techniques
    IEEE Transactions on Computers, Vol. 47, No. 11, November 1998.

    208. 1997

  208. A.L. Oliveira, L.P. Carloni, T. Villa, and A.L. Sangiovanni-Vincentelli
    An Implicit Formulation for Exact BDD Minimization of Incompletely Specified Functions
    in "VLSI: Integrated Systems on Silicon" (R. Reis and L. Claesen editors), Chapman-Hall 1997.

  209. L.P. Carloni, P. McGeer, A. Saldanha, and A.L. Sangiovanni-Vincentelli
    Trace-Driven Logic Synthesis: Application to Power Minimization
    The Proceedings of the International Conference on Computer-Aided Design (ICCAD) , 1997.

  210. E.I. Goldberg, L.P. Carloni, T. Villa, R.K. Brayton, and A.L. Sangiovanni-Vincentelli
    Negative Thinking in Search Methods: Application to Unate Covering
    The Proceedings of the International Conference on Computer-Aided Design (ICCAD) , 1997.

    211. 1996

  211. P. Miliozzi, L.P. Carloni, E. Charbon, and A.L. Sangiovanni-Vincentelli
    SubWave: a Methodology for Modeling Digital Substrate Noise Injection in Mixed-Signal ICs
    Proceedings of the IEEE Custom Integrated Circuit Conference (CICC), 1996.