CSEE W4823x: Handouts



Handout #1

Course Information (revised) (PDF )

Handout #2

Syllabus (PDF )

Handout #3

Homework, Project and Exam Schedule (PDF )

Handout #4

Questionnaire (PDF )

Handout #5

The Quine-McCluskey Method (PDF )

Lecture #2: Slides (corrected) (PDF )

Handout #6

Linear Feedback Shift Registers (hardcopy only, distributed in class)*

Handout #7

Counter Synthesis (hardcopy only, distributed in class)*

Handout #8

Homework #1 ( PDF )

Handout #9

Iterative Circuits (hardcopy only, distributed in class)*

Handout #10

State Minimization (hardcopy only, distributed in class)*

Lecture #6: Slides ( PDF )

Handout #11

Homework #2 (corrected) ( PDF )

Handout #12

Xilinx XC4000 FPGA's (hardcopy only)*

Handout #13

Binary Addition, Part 1 (hardcopy only, distributed in class)*

Lecture #9: Slides ( PDF )

Handout #14

Homework #1 Solutions (hardcopy only, distributed in class)*

Handout #15

Binary Addition, Part 2 (hardcopy only, distributed in class)*

Handout #16

Conditional Sum Adders: Detailed Implementation ( PDF )

Lecture #10: Slides (part 1) ( PDF )

Lecture #10: Slides (part 2) ( PDF )

Handout #17

Combinational Multipliers (hardcopy only, distributed in class)*

Handout #18

Homework #3 ( PDF )

Handout #19

Low-Power Sequential Logic Optimization
M. Alidina, J. Monteiro, S. Devadas, A. Ghosh and M. Papaefthymiou,
"Precomputation-Based Sequential Logic Optimization for Low Power,"
IEEE Transactions on VLSI Systems, v. 2:4, Dec. 1994, pp. 426-436.
( PDF )

Handout #20

Low Power Design Overview
T. Mudge, "Power: a First-Class Architectural Design Constraint,"
IEEE Computer, April 2001, pp. 52-58.
( PDF )

Handout #21

Homework #4 ( PDF )

Handout #22

Low-Power Bus Encoding
M.R. Stan and W.P. Burleson, "Bus Invert Coding for Low-Power I/O",
IEEE Transactions on VLSI Systems, v. 3:1, March 1995 (pp. 49-58)
(PDF )

Handout #23

Homework #2 Solutions (hardcopy only, distributed in class)*

Handout #24

Homework #3 Solutions (hardcopy only, distributed in class)*

Handout #25

Error Correction and Detection (hardcopy only, distributed in class)*

Handout #26

Midterm (hardcopy only, distributed in class)

Handout #27,
Handouts #27(a-f)

#27 Project #1: Designing a Master Controller for the Philips/NXP I2C Bus Protocol ( PDF )
#27a I2C Configuration and Protocol ( PDF )
#27b I2C Bus Technical Overview (Embedded Systems Academy) (Esacademy URL )
#27c I2C Getting Acknowledge from a slave (as a receiver) ( PDF )
#27d I2C-Bus Specification and User Manual (rev. 5, Oct. 2012) [NXP Semiconductors] (PDF )
#27e Frequently-Asked Questions (FAQ) ( TXT )
#27f Simulation, Submission and Demo Information  (PDF )

Handout #28

Homework #4 Solutions (hardcopy only, distributed in class)*

Handout #29

RTL Design Overview (excerpts) (hardcopy only, distributed in class)*

Handout #30(a)

Introduction to RTL Design (Part I)  ( PDF )

Handout #30(b)

Introduction to RTL Design (Part II)  ( PDF )

Handout #31

Midterm Solutions (hardcopy only, distributed in class)*

Handout #32

Project #2: Combinational Components (hardcopy only)*

Handout #33

Project #2: Sequential Components (hardcopy only)*

Handout #34
Handouts #34(a-c)

#34 Project #2: Designing a Custom Floating-Point Accelerator for Scientific Applications (PDF )
#34a Suggested Schedule and Checkpoint Information  ( TXT )
#34b What to Hand In  ( TXT )
#34c Frequently-Asked Questions (FAQ)  ( TXT )
#34d The Minimalist CAD Tool and Asynchronous Controller Design (PDF )
#34e Minimalist Tool: FAQ  ( TXT )

Handout #35

Introduction to Asynchronous Design ( PDF )

Handout #36

Asynchronous Design: Overview Article
S.M. Nowick and M. Singh, "Asynchronous Design -- Part 1: Overview and Recent Advances,"
IEEE Design & Test, v. 22:3, May/June 2015, pp. 5-18.
(PDF )

Handout #37

Introduction to Mousetrap Asynchronous Pipelines ( single-page PDF, double-page PDF  )

Handout #38

Asynchronous Controllers: overview (part 1) (PDF )

Handout #39

Asynchronous Controllers: Minimalist tutorial (part 2) ( PDF )

Handout #40

Introduction to Hazard-Free Logic Synthesis (single-page PDF, double-page PDF  )

Lecture #25: Slides ( PDF )

Handout #41

Asynchronous Design: Overview Article
S.M. Nowick and M. Singh, "Asynchronous Design -- Part 2: Systems and Methodologies,"
IEEE Design & Test, v. 22:3, May/June 2015, pp. 19-28.
(PDF )

Handout #42

Introduction to Approximate Computing
V. Gupta, D. Mohapatra, S. P. Park, A. Raghunathan and K. Roy,
"IMPACT: Imprecise Adders for Low-Power Approximate Computing,"
Proceedings of the 17th IEEE/ACM International Symposium on Low-Power Electronics and Design (2011)
(PDF )

Handout #43

Soft Errors Article #1
R. Baumann, "Soft Errors in Advanced Computer Systems",
IEEE Design and Test of Computers, May-June 2005 (pp. 258-266)
(PDF )

Handout #44

Soft Errors Article #2
T. Karnik, P. Hazucha and J. Patel, "Characterization of Soft Errors Caused by Single Event Upsets in CMOS Processes",
IEEE Transactions on Dependable and Secure Computing, vol. 1:2, April-June 2004 (pp. 128-143)
(PDF )


*Hardcopy only, see TA's for copies.