CSEE4823x						Handout #34b
Prof. Steven Nowick					November 22, 2016


              PROJECT #2 -- WHAT TO HAND IN

As indicated on Handout #34, you will design and optimize a 
solution for a variable-precision scientific function unit.

You will follow the first 6 steps of Handout #30(a)/(b),
plus a sketch of what to do in the 7th step (#7a below). 
In addition I now ask you to do TWO ADDITIONAL REQUIRED STEPS:

    STEP #7b:  DISCUSS YOUR DESIGN EXPERIENCE

    STEP #7c:  CA PRESENTATION SESSION 


---------------------------------------------------------------------------

================
WHAT TO HAND IN:  
================

[NOTE:  most of the items below are listed on Handout #34, but in addition,
	I have now asked you to do STEPS #7b and #7c.]


1. WRITTEN ALGORITHM (in PSEUDO-CODE) for the system's behavior.

	ADD 2-3 PARAGRAPHS OF TEXT DISCUSSION, explaining how your
	algorithm works, what decisions you made, what level of optimization
	you achieved (i.e. how many operations per clock cycle, in each
	iteration of the inner loop) and anything else
	that can help the CA understand the flow of its operation.

	This text should be clearly written, in a top-down way,
	that should document and clearly explain and give insight to an 
	interested reader (e.g. the CA) the basics of your approach and 
	specification.

	See FAQ for guidelines on good documentation and annotation.


2. WRITTEN FORMAL SPECIFICATION for the algorithm, in the form of 
	a GENERALIZED ASM (Moore style).  

	See FAQ for guidelines on good documentation and annotation.

3. SHOW RESOURCE ALLOCATION OF DATAPATH COMPONENTS, i.e. select 
	datapath blocks needed (including any necessary MUXes, hardwiring 
	of inputs, and optimizations), following the written presentation
	style of Handout #30(a)/(b):  *clearly drawing* the block, 
	indicating its operating reduced truth table, indicating which states 
	in the generalized ASM perform which operations on the component, 
	etc.

4. IDENTIFY STATUS SIGNALS (outputs of datapath, which are inputs to 
	control), and allocate any additional datapath blocks required to 
	generate these status signals;

5. DRAW THE FINAL MICRO-ARCHITECTURE OF THE SYSTEM, showing all datapath 
	blocks, a single block for the control, and including all wiring 
	between blocks (external inputs/outputs, control and status signals);

6. DERIVE/DRAW A MOORE CONTROLLER ASM SPECIFICATION, using simple 
   	(B/V-style control-only) ASM, following the technique presented 
	in Handout #30(a)/(b);

7a. SKETCH THE PROCEDURE TO TRANSFORM THE MOORE CONTROLLER ASM INTO A 
   MOORE CONTROLLER FSM (STATE DIAGRAM).  You do not need to draw the
        resulting Moore state diagram; just precisely indicate all steps 
	needed to make this transformation.

7b. DISCUSS DESIGN EXPERIENCE.  Write 3-4 paragraphs, explaining design 
	experiences, how you derived your solution, and challenges.
	Include discussion of how you dealt with the 'corner' cases
	(i.e. special cases, involving early termination, or requiring
	special handling).  Also indicate explicitly what
	level of optimization you achieved (# of core operations performed
	per clock cycle, in steady-state operation of the inner loop),
	and discussion of how you achieved this optimized level of
	performance.

7c. CA PRESENTATION SESSION.  Sign up for a presentation session with
        the CA.  Bring a copy of your completed solution writeup to the 
	Handout #34 RTL problem.  Be prepared to discuss, walking the 
	CA through your answers to #1-7a above, and to answer questions.

	See separate upcoming announcement for doodle signup.  Sign up with 
	the same CA you met for the earlier checkpoint.  *All* group members
	must be present.  

======================
WHERE/WHEN TO HAND IN:  
======================

--------------------
required submission:
--------------------

For the required solution, parts #1-6 and #7a and 7b, give a hardcopy version
to one of the CA's or professor by *4pm on MONDAY 12/12*. (Details will be 
announced later.)

---------------------------------------------------------------------------