Stephen A. Edwards Columbia University Crown
CSEE 4840
Embedded System Design
Spring 2023

General Information

Class meets Fridays, 1:10 - 3:40 PM in 451 CSB.

Mudd 1235 is the lab, which is filled with Linux workstations. Registered students will receive accounts on these machines and 24-hour badge access to this room.

Do the labs in groups of three. Project groups should be three students or more.


Name Email Office hours Location
Prof. Stephen A. Edwards By appt. Online
Ajay Vanamali Th 5-7 1235 Mudd
Bhoomi Shah W 4-6 1235 Mudd
Manish Shankar T 3-5 1235 Mudd
Rahul Shanbhag M 4-6 1235 Mudd


Prerequisites: ELEN E3910 or COMS W3843 or the equivalent. Embedded system architecture and programming. I/O, analog and digital interfacing, and peripherals. Weekly laboratory sessions and term project on design of a microprocessor-based embedded system including at least one custom peripheral. Knowledge of C programming and digital logic required. Lab required.

The goal of this class is to introduce you to issues in hardware/software interfacing, practical microprocessor-based system design issues such as bus protocols and device drivers, and practical digital hardware design using modern logic synthesis tools. You will put all of this to use in the lab where you will be given the opportunity to implement, using a combination of C and the SystemVerilog hardware description langauge, a small embedded system.

This is a lab course done in two parts. During the first part of the class, each student will implement the same "canned" designs designed by the instructor and be given substantial guidance. These are meant as an opportunity for you to learn the development tools and basic concepts. In the second part of the class, you will divide up into teams and each will design and implement a comparable project of their own with guidance from the instructor and TAs.

This course is a capstone in which students will integrate their knowledge of digital logic, programming, and system design to produce a real system. It is intended to complement ELEN 4340, Computer Hardware Design. 4840 focuses more on system-design issues and include a large section on hardware/software integration. Students in 4840 will use gates, processors, peripherals, software, and operating systems as building blocks.


CSEE 3827, Fundamentals of Computer Systems or the equivalent. You must understand digital logic design. Prior experience with hardware description languages, FPGAs, or embedded processors is not required.

COMS 3157, Advanced Programming or the l equivalent. Specifically, C programming experience. While 4840 will teach you advanced aspects of embedded C programming, you need to come in with significant C experience.

COMS W4823, Advanced Digital Logic Design. While not a formal prerequisite, you are strongly encouraged to take it. In it, you will learn advanced logic design and HDL coding, both of which are crucial to success in 4840.


Date Lecture Notes Due
Fri Jan 20 Introduction: Embedded Systems
Fri Jan 27 SystemVerilog
Fri Feb 3 Memory
Fri Feb 10 Networking, USB, and Threads
Thu Feb 16 (none)

Lab 1 pdf
Fri Feb 17 Hardware/Software Interfaces
Fri Feb 24 The Avalon Bus
Mon Feb 27 Proposal
Thu Mar 2 (none)

Lab 2 pdf
16 GB SD Card Image.tar.gz
Fri Mar 3 Device Drivers
Fri Mar 10 Qsys and IP Core Integration
Mar 13-17 Spring Break
Thu Mar 23 (none)

Lab 3 pdf
.tar.gzHardware files
.tar.gzSoftware FIles
.tar.gzKernel Module Env.
Fri Mar 24 Sprite Graphics
Line drawing example
Processors, FPGAs, and ASICs (1/2)
Processors, FPGAs, and ASICs (2/2)
Audio Waveforms
Thu Mar 30 (none)

Design document
Fri Mar 31
Fri Apr 7 Design reviews

Fri Apr 14
Fri Apr 21
Fri Apr 28
May 11 Final Project Presentations

The Project

You'll perform a design-it-yourself project in the second half of the class. There are five deliverables for the project:

  1. A short project proposal describing in broad terms what you plan to build and how you plan to build it
  2. A detailed project design describing in detail the architecture of your project, both hardware and software. This should include block diagrams, memory maps, lists of registers: everything someone else would need to understand your design. You should have done some preliminary implementation work by this point to validate your design.
    Your design document should also a plan of what you intend to complete by each of the three milestones.
  3. Three milestones that you set for yourself: think of 25%, 50%, and 75% completion
  4. A presentation on your project to the class
  5. A final project report

Project teams should be three students or more.

The Design Document

This document should explain what you're going to build and how you're going to build it, but does not not need to include code. A corrected version of this document that reflects what you actually built should end up in your final project report.

Include the following things:

  1. A block diagram
  2. A description of the algorithms your project will implement
  3. Resource budgets, e.g., for on-chip memory
  4. A detailed plan for the hardware/software interface: every register and bit

The Project Report

This is a critical part of the project and will be a substantial fraction of the grade.

Include the following sections:

  1. An overview of your project: a revised version of your project proposal.
  2. The detailed project design documents: a revised version of the project design.
  3. A section listing who did what and what lessons you learned and advice for future projects
  4. Complete listings of every file you wrote for the project. Include C source, SystemVerilog source, and things such as .mhs files. Don't include any file that was generated automatically.

Include all of this in a single .pdf file (don't print it out).

Also create a .tar.gz file (see the online documentation for the `tar' program to see how to create such a file. Briefly, create a file called `myfile' with the names of all the files you want to include in the archive and run tar zcf project.tar.gz `cat myfiles` to create the archive.) that just includes the files necessary to build your project, such as I did for the labs.


Anteater: Videogame (MS)
pdfProposal pdfDesign pdfReport
Chirag Chaturvedi and Gabriela Gonzalez
Autotune: Audio processor (AV)
pdfProposal pdfDesign pdfReport ArchiveFiles
Adam Banees, Cam Coleman, and Khaela Harrod
BlackjackCounter: Card counter with image recognition (RS)
pdfDesign pdfReport ArchiveFiles
Joseph Han, Michael Ozymy, and Lennart Schulze
Breakout: Videogame (MS)
pdfProposal pdfDesign pdfReport ArchiveFiles
Jason Eriksen and Xurxo Riesco Perez
CNN: Neural Network Accelerator (AV)
pdfProposal pdfDesign pdfReport ArchiveFiles
Yufei Jin, Gehui Liang, Yufei Qian, Shiwen Tang, and Yi Wang
Combat: Videogame (BS)
pdfProposal pdfDesign UNRECOGNIZED FILETYPEReport
Tameem Asif and Patrick Puma
GestureManipulator: Robot controller (BS)
pdfProposal pdfDesign pdfReport ArchiveFiles
Jiamiao He, Yi Wang, Fan Wu, and Tailai Zhang
GoldMiner: Bitcoin miner (RS)
pdfProposal pdfDesign ArchiveFiles
Jules Comte, Zhe Mo, Tianyu Qin, Mingyang Song, and Xueji Zhao
HuarongDao: Logic Videogame (BS)
pdfProposal pdfDesign pdfReport ArchiveFiles
Rui Chu, Nina Hsu, Haobo Liu, Jiusheng Zhang, and Jingwei Zhang
MobileNet: CNN Image Detection Accelerator (AV)
pdfProposal pdfDesign pdfReport ArchiveFiles
Haomiao Li, Yue Niu, Tianchen Yu, Qixiao Zhang, and Haichun Zhao
NESemulator: Videogame Console Emulator (SE)
pdfProposal pdfDesign
Otitodirichukwu Darl-Uzu, Jason Lam, and Tyler Manrique
NetworkedCamera: Security Camera (RS)
pdfProposal pdfDesign pdfReport ArchiveFiles
Michael Lee, Kenny Martinez, Carlos Nunez-Huitron, James Phan, and Patricio Tapia
NoCallerID: VOIP Phone with Effects (AV)star
pdfProposal pdfDesign pdfReport ArchiveFiles
Marian Abuhazi, Maximilian Acebal, Rebekah Kim, and Noah Silverstein
Rhythm: Videogame (BS)
pdfProposal pdfDesign pdfReport ArchiveFiles
Xinyuan Fu, Zerui Li, Lu Zhang, Qiao Zhang, and Jinke Zhao
SecureCam: Security Camera (AV)
pdfProposal pdfDesign pdfReport ArchiveFiles
Mir Naveen Alam, Carlos Cruz, Eliot Flores Portillo, Noe Silva, and Shifeng Zhang
Sketchmaster: Drawing system (SE)star
pdfProposal pdfDesign UNRECOGNIZED FILETYPEFiles
Manish Rangarajan Shankar, Bhoomi Shah, Rahul Shanbhag, and Ajay Vanamali
Snake: Videogame (MS)
pdfProposal pdfReport ArchiveFiles
Jiawen Liu, Yue Rao, Yuyang Wang, Tao Yan, and Yuheng Zhang
SpaceInvaders: Videogame (RS)
pdfProposal pdfDesign pdfReport
Zachary Burpee, Alan Hwang, and Mili Sehgal
SuperMario: Videogame (BS)
pdfProposal pdfDesign pdfReport ArchiveFiles
Hangpu Cao, Shen Gao, Zeqi Li, Zhiyuan Liu, and Han Yang
Tank: Videogame (MS)star
pdfProposal pdfDesign pdfReport ArchiveFiles
Quinn Booth, Ganesan Narayanan, and Ana Maria Rodriguez
Tetris: Videogame (MS)
pdfProposal pdfDesign pdfReport ArchiveFiles
Eva Gupta, Malik Hubbard, Zain Merchant, and Maxfield Parson-Scherban
TopGun: Videogame (RS)
pdfProposal pdfDesign pdfReport ArchiveFiles
Aparna Muraleekrishnan, Eashan Sapre, and Kuraloviyan Senthilnathan
ZyloZinger: Rhythm game (SE)star
pdfProposal pdfDesign pdfReport ArchiveFiles
Sienna Brent, Rajat Tyagi, Riona Westphal, and Alex Yu
qSIFT: Image Processing Accelerator (AV)star
pdfProposal pdfDesign pdfReport ArchiveFiles
Madhav Narayan Bhat Talapady, Khushi Anil Gupta, Prathamesh Sahasrabudhe, Daniel Seligson, and Jeffrey Wolberg

star My favorites


Other References

Recommended Texts

Mark Zwolinski.
Digital System Design with SystemVerilog.
Prentice-Hall, 2010.

SystemVerilog is relatively new, so there are not too many books out there for it. This is one of the better ones. It focuses on the sythesizable subset of the language and also discusses test benches.

Cover of Digital System Design with SystemVerilog

James K. Peckol.
Embedded Systems: A Contemporary Design Tool.
Wiley, 2008.

Many embedded system books are too idiosyncratic or incomplete for my taste, but this one does a nice job covering everything from digital circuit design to interprocess communication in real-time operating systems. It only discusses the Verilog language and only in an appendix.

Cover of Embedded Systems: A Contemporary Design Tool


Class Policies

Grading 30% Labs
10% Milestone 1
15% Milestone 2
20% Milestone 3
25% Final Report and presentation
Late Policy Zero credit for anything handed in after it is due without explicit approval of the instructor.
Collaboration Policy Work in groups of three on the labs. You may consult others, but do not copy files or data. You may collaborate with anybody on the project, but must cite sources if you use code.

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