CSEE 4840 Embedded System Design Spring 2007

Highlights

General Information

Class meets Tuesdays and Thursdays, 11:00 AM - 12:15 PM in Room 227, Mudd.

Mudd 1235 is the lab, which is filled with Linux workstations and FPGA boards. Registered students will receive accounts on these machines and 24-hour badge access to this room.

Do the lab by yourself. Project groups should be three students or more.

Staff

Overview

Prerequisites: ELEN E3910 or COMS W3843 or the equivalent. Embedded system architecture and programming. I/O, analog and digital interfacing, and peripherals. Weekly laboratory sessions and term project on design of a microprocessor-based embedded system including at least one custom peripheral. Knowledge of C programming and digital logic required. Lab required.

This is a modernization of ELEN E3940y, Microprocessor Laboratory. Its goal is to introduce you to issues in hardware/software interfacing, practical microprocessor-based system design issues such as bus protocols and device drivers, and practical digital hardware design using modern logic synthesis tools. You will put all of this to use in the lab where you will be given the opportunity to implement, using a combination of C and the VHDL hardware description langauge, a small embedded system.

This is a lab course done in two parts. During the first part of the class, each student will implement the same ``canned'' designs designed by the instructor and be given substantial guidance. These are meant as an opportunity for you to learn the development tools and basic concepts. In the second part of the class, you will divide up into teams and each will design and implement a comparable project of their own with guidance from the instructor and TAs.

This course is designed to take over the role ELEN 3940 once played in the EE and Computer Engineering curriculum, i.e., as a capstone class in which students will integrate their knowledge of digital logic, programming, and system design to produce a real system. It is intended to complement ELEN 4340, Computer Hardware Design. 4840 will focus more on system-design issues and include a large section on hardware/software integration. Students in 4840 will use processors and peripherals as building blocks. By contrast, students in 4340 have logic gates as building blocks.

Possible projects include:

• Digital tone control (analog audio in/out, digital DSP operations)
• Digital sound effects processor (e.g., echo, tone shifting)
• Real-time spectrum analyzer (audio in, FFT, VGA display)
• Simple video effects processor (e.g., solarization, inversion)
• Speech synthesizer (analog audio out, hard-wired vocal tract models)
• Digital picture frame (CF to JPEG decoder, VGA out)
• Internet radio (digital audio in via Ethernet, analog audio out)

Prerequisites

ELEN E3910 or COMS W3843 or the equivalent. You must understand digital logic design and C programming. Prior experience with hardware description languages, FPGAs, or embedded processors is not required.

You are strongly encouraged to take COMS W4823, Advanced Programming. In it, you will learn logic design and VHDL coding, both of which are crucial to success in 4840.

Tutorials

• Writing VHDL for RTL Synthesis: A small tutorial with examples of VHDL code.

Schedule

Date	Lecture	Notes	Due
January 16	Embedded Systems
January 18	VHDL 1
January 23	VHDL 2
January 25	VHDL 3		Lab 1
January 30	Low-Level C Programming
February 1	(no lecture)
February 6	Ethernet and the PS/2 keyboard		Lab 2
February 8	HW/SW Interfaces
February 13	Video
February 15	The Avalon Bus		Lab 3
February 20	Processors, FPGAs, and ASICs		Proposal
February 22	Memory
February 27	Serial Communication
March 1	(no lecture)
March 6	(no lecture)
March 8	(no lecture)
March 12-16	Spring Break
March 20
March 22			Design
March 27
March 29
April 3
April 5
April 10
April 12			75% Demo
April 17	(no lecture)
April 19	(no lecture)
April 24
April 26
May 8	Final Presentations, reports due		Project

The Project

You'll perform a design-it-yourself project in the second half of the class. There are five deliverables for the project:

1. A short project proposal describing in broad terms what you plan to build and how you plan to build it
2. A detailed project design describing in detail the architecture of your project, both hardware and software. This should include block diagrams, memory maps, lists of registers: everything someone else would need to understand your design. You should have done some preliminary implementation work by this point to validate your design.
3. An early demo of your project. It should be roughly 75% working and be showing signs of life. This is to make sure you are making reasonable forward progress.
4. A presentation on your project to the class
5. A final project report

Project groups should be three students or more.

The Project Report

This is a critical part of the project and will be a substantial fraction of the grade.

Include the following sections:

1. An overview of your project: a revised version of your project proposal.
2. The detailed project design documents: a revised version of the project design.
3. A section listing who did what and what lessons you learned and advice for future projects
4. Complete listings of every file you wrote for the project. Include C source, VHDL source, and things such as .mhs files. Don't include any file that was generated automatically.

Include all of this in a single .pdf file (don't print it out) and email it to me on the due date.

Also create a .tar.gz file (see the online documentation for the `tar' program to see how to create such a file. Briefly, create a file called `myfile' with the names of all the files you want to include in the archive and run tar zcf project.tar.gz `cat myfiles` to create the archive.) that just includes the files necessary to build your project, such as I did for the labs. Also email this to me by the due date.

Projects

CardCounter: (DL) Proposal    Design    Final Report    Project Files    Presentation    Christos Savvopoulos    Hugh Gordon    Nathan Rogan

DigitalCamera: (SE) Proposal    Design    Final Report    Project Files    Juan Barroso    Abelardo Gutierrez

PictureBrowser: (DL) Proposal    Final Report    Project Files    Jean Kongpinda    Stephane Nyombayire    Joseanibal Colon-Ramos    Ian Roth

Imagic: (SE) Proposal    Design    Final Report    Project Files    Abhilash Itharaju    Nalini Vasudevan    Vitaliy Shchupak    Walter Dearing

TupacMan: (YG) Proposal    Design    Final Report    Project Files    Michael Pierorazio    Varun Mehta    Jeffrey Cropsey

Clue: (SE) Proposal    Design    Final Report    Sampada Sonalkar    Gaurav Gupta    Thomas Mwakibinga    Khalef Hosany

Life: (YG) Proposal    Design    Final Report    Project Files    Presentation    Juan Gutierrez    Steven Chen    Vincenzo Zarrillo

GuitarEffects: (DL) Proposal    Design    Final Report    Project Files    Navarun Jagatpal    Fred Rassam    Young Jin Yoon    Elton Chung

InternetRadio: (DL & YG) Proposal    Design    Final Report    Project Files    Kai Li    SingWang Ho    Min Yang

ButtonHero: (YG) Proposal    Design    Final Report    Project Files    Kenneth Yu    Charles Lam    George Liao    JooHan Chang

Altera Documentation

• The DE2 Homepage

• DE2 Development and Education Board (an introduction)
• DE2 User Manual
• DE2 Schematics
• Cyclone II Device Handbook v1 (the FPGA on the DE2)
• Quartus II Quick Start Guide
• Introduction to Quartus II
• The Quartus Handbook Volume 1: Design and Synthesis Writing VHDL, running logic synthesis
• The Quartus Handbook Volume 2: Design Implementation and Optimization Area, Timing, and Power optimization
• The Quartus Handbook Volume 3: Verification Simulation, timing analysis
• The Quartus Handbook Volume 4: SOPC Builder Nios II-based systems, the Avalon communication fabric
• The Quartus Handbook Volume 5: Embedded Peripherals SDRAM controller, JTAG UART, Flash controller, etc.
• Nios II Processor Reference Handbook Describes the instruction set, architecture, and how to implement it in SOPC builder.
• Nios II Software Developer's Handbook Describes how to develop software for the Nios II: the IDE, accessing hardware, using Ethernet, etc.
• Avalon Memory-Mapped Interface Specification Describes the protocol for the Avalon communication fabric, i.e., how to write peripherals that can be connected to the Nios II in SOPC builder.

Altera DE2 Tutorials

• Quartus II Introduction Using VHDL Design This goes into a little more depth than the instructions for lab 1, but is not a replacement.
• Timing Considerations with VHDL-Based Designs Talks about how to impose timing constraints (e.g., the clock frequency) and understand the results of the timing analyzer.
• Quartus II Simulation with VHDL Designs This uses Altera's simulator, which uses a GUI to enter test bench waveforms. It is an alternative to ModelSim.
• Introduction to the Altera SOPC Builder This describes how to create systems that include the Nios II processor and software. See the Nios II Software Developer's Handbook for better information about developing software and using the IDE.
• Using Library Modules in VHDL Designs This is about how to ask for and use ``Megafunctions,'' Altera's name for things like multipliers, decoders, counter, etc.
• Using the SDRAM Memory on Altera's DE2 Board How to use the gigantic memory on the board. Described for Verilog, not VHDL.

Datasheets for DE2 Peripherals

• Analog Devices ADV7123 video DAC
• Wolfson WM8731 audio CODEC
• MAX232 RS-232 level shifter
• Davicom DM9000A Fast Ethernet controller
• Davicom DM9000A Application Notes
• Analog Devices ADV7181 video decoder
• Philips ISP1362 USB 2.0 controller
• Philips ISP1362 Embedded Programming Guide
• Agilent HSDL-3201 infrared tranceiver for IrDA
• 8-Mbyte SDRAM
• 512 Kbyte SRAM
• 4 Mbyte Flash

Links

• CSEE 4840 from Spring 2006
• Embedded System Design from Summer 2005
• CSEE 4840 from Spring 2005
• CSEE 4840 from Spring 2004
• Web resources for Vahid and Givargis
• VHDL examples
• Other VHDL resources
• Ken Shepard's EE 4340 class (2003)
• Ken Shepard's EE 4340 class (1999)

Class Policies