Stephen A. Edwards Columbia University Crown
CSEE 4840
Embedded System Design
Spring 2024

General Information

Class meets Mondays and Wednesdays, 1:10 - 2:25 PM in 451 CSB.

Mudd 1235 is the lab, which is filled with Linux workstations. Registered students will receive accounts on these machines and 24-hour badge access to this room.

Do the labs in groups of two or three. Project groups should be 3-5 students; aim for 4.

Staff

Name Email Office hours Location
Prof. Stephen A. Edwards sedwards@cs.columbia.edu By appt. Online
Martha Barker mbarker@cs.columbia.edu 1235 Mudd
Abhilash Ganga ag4797@columbia.edu M 3-5 1235 Mudd
Vasileios Panousopoulos vp2518@columbia.edu T 12-2P 1235 Mudd
Marian Abuhazi ma4107@columbia.edu 1235 Mudd

Overview

Prerequisites: ELEN E3910 or COMS W3843 or the equivalent. Embedded system architecture and programming. I/O, analog and digital interfacing, and peripherals. Weekly laboratory sessions and term project on design of a microprocessor-based embedded system including at least one custom peripheral. Knowledge of C programming and digital logic required. Lab required.

The goal of this class is to introduce you to issues in hardware/software interfacing, practical microprocessor-based system design issues such as bus protocols and device drivers, and practical digital hardware design using modern logic synthesis tools. You will put all of this to use in the lab where you will be given the opportunity to implement, using a combination of C and the SystemVerilog hardware description langauge, a small embedded system.

This is a lab course done in two parts. During the first part of the class, each student will implement the same "canned" designs designed by the instructor and be given substantial guidance. These are meant as an opportunity for you to learn the development tools and basic concepts. In the second part of the class, you will divide up into teams and each will design and implement a comparable project of their own with guidance from the instructor and TAs.

This course is a capstone in which students will integrate their knowledge of digital logic, programming, and system design to produce a real system. It is intended to complement ELEN 4340, Computer Hardware Design. 4840 focuses more on system-design issues and include a large section on hardware/software integration. Students in 4840 will use gates, processors, peripherals, software, and operating systems as building blocks.

Prerequisites

CSEE 3827, Fundamentals of Computer Systems or the equivalent. You must understand digital logic design. Prior experience with hardware description languages, FPGAs, or embedded processors is not required.

COMS 3157, Advanced Programming or the l equivalent. Specifically, C programming experience. While 4840 will teach you advanced aspects of embedded C programming, you need to come in with significant C experience.

COMS W4823, Advanced Digital Logic Design. While not a formal prerequisite, you are strongly encouraged to take it. In it, you will learn advanced logic design and HDL coding, both of which are crucial to success in 4840.

Schedule

Date Lecture Notes Due
Wed Jan 17 Introduction: Embedded Systems
pdf
Mon Jan 22 SystemVerilog
pdf
Wed Jan 24 (lecture cancelled)

Mon Jan 29 SystemVerilog, via Zoom

Wed Jan 31 SystemVerilog, contd.

Mon Feb 5 Memory
pdf
Wed Feb 7 "

Fri Feb 9 Lab 1 pdf
Files.tar.gz
Mon Feb 12 Networking, USB, and Threads
pdf
Wed Feb 14 "

Mon Feb 19 Video
pdf
Wed Feb 21 Hardware/Software Interfaces
pdf
Mon Feb 26 The Avalon Bus
pdf
Proposal
Wed Feb 28 Device Drivers
pdf
Fri Mar 1 Lab 2 pdf
Files.tar.gz
16 GB SD Card Image.tar.gz
Mon Mar 4 Qsys and IP Core Integration
Debugging
pdf
pdf
Wed Mar 6 Sprite Graphics
Line drawing example
Processors, FPGAs, and ASICs (1/2)
Processors, FPGAs, and ASICs (2/2)
Audio Waveforms
pdfpdf
pdfpdf
pdfpdf
pdfpdf
pdfpdf
Mar 11-15 Spring Break
Mon Mar 18 (no lectures going forward)

Wed Mar 20
Fri Mar 22 Lab 3 pdf
.tar.gzHardware files
.tar.gzSoftware FIles
.tar.gzKernel Module Env.
Mon Mar 25
Wed Mar 27
Fri Mar 29

Design document
Mon Apr 1
Wed Apr 3
Mon Apr 8
Wed Apr 10
Mon Apr 15 Design reviews

Wed Apr 17 Design reviews

Mon Apr 22
Wed Apr 24
Mon Apr 29
May 9 Final Project Presentations

The Project

You'll perform a design-it-yourself project in the second half of the class. There are five deliverables for the project:

  1. A short project proposal describing in broad terms what you plan to build and how you plan to build it
  2. A detailed project design describing in detail the architecture of your project, both hardware and software. This should include block diagrams, memory maps, lists of registers: everything someone else would need to understand your design. You should have done some preliminary implementation work by this point to validate your design.
    Your design document should also a plan of what you intend to complete by each of the three milestones.
  3. Three milestones that you set for yourself: think of 25%, 50%, and 75% completion
  4. A presentation on your project to the class
  5. A final project report

Project teams should be three students or more.

The Design Document

This document should explain what you're going to build and how you're going to build it, but does not not need to include code. A corrected version of this document that reflects what you actually built should end up in your final project report.

Include the following things:

  1. A block diagram
  2. A description of the algorithms your project will implement
  3. Resource budgets, e.g., for on-chip memory
  4. A detailed plan for the hardware/software interface: every register and bit

The Project Report

This is a critical part of the project and will be a substantial fraction of the grade.

Include the following sections:

  1. An overview of your project: a revised version of your project proposal.
  2. The detailed project design documents: a revised version of the project design.
  3. A section listing who did what and what lessons you learned and advice for future projects
  4. Complete listings of every file you wrote for the project. Include C source, SystemVerilog source, and things such as .mhs files. Don't include any file that was generated automatically.

Include all of this in a single .pdf file (don't print it out).

Also create a .tar.gz file (see the online documentation for the `tar' program to see how to create such a file. Briefly, create a file called `myfile' with the names of all the files you want to include in the archive and run tar zcf project.tar.gz `cat myfiles` to create the archive.) that just includes the files necessary to build your project, such as I did for the labs.

Sample Project: Wireframe

Projects

2048-Game: (MB)
pdfProposal pdfDesign
Jingtian Lin, Kanghui Lin, and Yunhao Xing
Audio-Visualizer: (MA)
pdfProposal pdfDesign
Gaurav Agarwal, Maxwell Lavey, Yaagna Modi, and Manas Pange
BameGoy: GameBoy Clone (SE)
pdfProposal pdfDesign
Nicolas Alarcon, Claire Cizdziel, and Donovan Sproule
Bomber-Man: Videogame (AG)
pdfProposal pdfDesign
Natalie Hughes, Shiyan Wang, and Qian Zhao
Bubble-Bobble: Videogame (MB)
pdfProposal pdfDesign
Lance Chou, Qingyuan Liu, Ke Liu, and Hongzheng Zhu
Crazy-Arcade: (AG)
pdfProposal pdfDesign
Yuqi Lin, Yelin Mao, and Hongkuan Yu
DaFPGASwitch: Model Network Switch (SE)
pdfProposal pdfDesign
Lauren Mika Chin, Fathima Hakeem, Teng Jiang, Ilgar Mammadov, and Irfan Tamim
Donkey-Kong: (MB)
pdfProposal pdfDesign
Ines Khouider, Ania Krzyzanska, and Sean Stothers
FASTRADE: (VP)
pdfProposal pdfDesign
Yixuan Li, Wenbo Liu, Weitao Lu, and Xiaolei Zhao
FFT: (MA)
pdfProposal pdfDesign
Yucong Li, Yuxiao Qu, Ning Xia, and Yimin Yang
FPGA-Cat-Invaders: (MB)
pdfProposal pdfDesign
Adam Jablonski, Fernandos Magee Jr., Yilei Meng, Yuxiang Xia, and Zhili Yan
FPGA-Tetris: (AG)
pdfProposal pdfDesign
Chuyi Jiang and Xinzi Yu
FPGA-music-mixer: (MA)
pdfProposal pdfDesign
Joy He, Oliver MacGregor, Harrison Riley, and Joshua Zhou
Gomoku: (MB)
pdfProposal pdfDesign
Zixuan Fang, Yunzhou Li, Hongyu Sun, and Zhiwei Xie
Guitar-Hero: Rhythm videogame (MA)
pdfProposal pdfDesign
Kiryl Beliauski, Patrick Cronin, and Daniel Ivanovich
HFT-Book-Builder: (VP)
pdfProposal pdfDesign
Ameya Keshava Mallya, Shivam Shekhar, and Choka Thenappan
Harmony-Hand: Pitch bender (SE)
pdfProposal pdfDesign
Sanjay Rajasekharan, Maria Rice, and Steven Winnick
LeNet-Classifier: MNIST CNN Classifier (SE)
pdfProposal pdfDesign
Tharun Kumar Jayaprakash, Vasileios Panousopoulos, Prathmesh Patel, and Rishit Thakkar
Mario: (VP)
pdfProposal pdfDesign
Brandon Khadan, Bo Kizildag, and Nicholas de la Cruz
Monster-Casino: (VP)
pdfProposal pdfDesign
Shaokun Feng, Chenzhi Lu, and Zongwei Zhen
Rhythm-Matching: (MA)
pdfProposal
Qiuhong Chen, Yizhan Zhang, and Shifei Zheng
Screaming-Bird: (MB)
pdfProposal pdfDesign
Yiran Hu, Yang Li, Yuesheng Ma, and Chenyang Zhou
Sequencer: (MA)
pdfProposal pdfDesign
Brandon Cruz, Adrian Florea, and Alexander Ranschaert
Snake-Game: (AG)
pdfProposal pdfDesign
Saher Iqbal, Cristopher Marte Marte, Somya Mehta, and Rohan Rabbi
Sound-Localizer: (SE)
pdfProposal pdfDesign
Matheu Campbell, Elvis Wang, Peiran Wang, and Dawn Yoo
Sports-Arbitrage: (VP)
pdfProposal pdfDesign
Brennan McManus, Shivan Mukherjee, Jonathan Nalikka, Chelsea Soemitro, and Shreya Somayajula
TankGo: (AG)
pdfProposal pdfDesign
Annie Peng, Jiayi Wang, Yizhi Wang, and Xuanbo Xu

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Resources

Other References

Recommended Texts

Mark Zwolinski.
Digital System Design with SystemVerilog.
Prentice-Hall, 2010.

SystemVerilog is relatively new, so there are not too many books out there for it. This is one of the better ones. It focuses on the sythesizable subset of the language and also discusses test benches.

Cover of Digital System Design with SystemVerilog

James K. Peckol.
Embedded Systems: A Contemporary Design Tool.
Wiley, 2008.

Many embedded system books are too idiosyncratic or incomplete for my taste, but this one does a nice job covering everything from digital circuit design to interprocess communication in real-time operating systems. It only discusses the Verilog language and only in an appendix.

Cover of Embedded Systems: A Contemporary Design Tool

Links

Class Policies

Grading 30% Labs
10% Milestone 1
15% Milestone 2
20% Milestone 3
25% Final Report and presentation
Late Policy Zero credit for anything handed in after it is due without explicit approval of the instructor.
Collaboration Policy Work in groups of three on the labs. You may consult others, but do not copy files or data. You may collaborate with anybody on the project, but must cite sources if you use code.

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