Conference (and Refereed Symposium/Workshop) Papers

    Latency-Insensitive Design

  1. C.-H. Li, S. Sonalkar, and L.P. Carloni
    Exploiting Local Logic Structures to Optimize Multi-Core SoC Floorplanning
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2010.

  2. C.-H. Li and L.P. Carloni
    Using Functional Independence Conditions to Optimize the Performance of Latency-Insensitive Systems
    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 2007.

  3. R. Collins and L. P. Carloni
    Topology-Based Optimization of Maximal Sustainable Throughput in a Latency-Insensitive System
    The Proceedings of the Design Automation Conference (DAC), 2007.

  4. C.H. Li, R. Collins, S. Sonalkar and L. P. Carloni
    Design, Implementation, and Validation of a New Class of Interface Circuits for Latency-Insensitive Design
    Fifth ACM-IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE), 2007.

  5. L.P. Carloni
    The Role of Back-Pressure in Implementing Latency-Insensitive Systems
    Electronic Notes in Theoretical Computer Science ENTCS 146-2, Vol. 146, No. 2, January 2006

  6. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Performance Analysis and Optimization of Latency-Insensitive Systems
    The Proceedings of the Design Automation Conference (DAC), 2000.

  7. L.P. Carloni, K.L. McMillan, A. Saldanha, and A.L. Sangiovanni-Vincentelli
    A Methodology for Correct-by-Construction Latency-Insensitive Design
    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 1999.

  8. L.P. Carloni, K.L. McMillan, and A.L. Sangiovanni-Vincentelli
    Latency-Insensitive Protocols
    In N. Halbwachs and D. Peled, editors, Proc. of the 11th Intl. Conf. on Computer-Aided Verification (CAV), LNCS 1633, © Springer-Verlag, 1999

    System-Level Design

  9. H.-Y. Liu and L.P. Carloni
    On Learning-Based Methods for Design-Space Exploration with High-Level Synthesis
    The Proceedings of the Design Automation Conference (DAC), 2013.

  10. N. Bombieri, H.-Y. Liu, F. Fummi, and L.P. Carloni
    A Method to Abstract RTL IP Blocks into C++ Code and Enable High-Level Synthesis
    The Proceedings of the Design Automation Conference (DAC), 2013.

  11. H.-Y. Liu, M. Petracca, and L.P. Carloni
    Compositional System-Level Design Exploration with Planning of High-Level Synthesis
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2012. (Best Paper Award).

  12. N. Sturcken, E. J. O'Sullivan, N. Wang, P. Herget, B. Webb, L. T. Romankiw, M. Petracca, R. Davies, R. Fontana, G. M. Decad, I. Kymissis, A. V. Peterchev, L.P. Carloni, W.J. Gallagher, and K.L. Shepard
    A 2.5D Integrated Voltage Regulator Using Coupled Magnetic Core Inductors on Silicon Interposer Delivering 10.8A/mm2
    International Solid-State Circuits Conference (ISSCC), 2012.

  13. N. Sturcken, M. Petracca, S. Warren, L.P. Carloni, A.V. Peterchev, and K.L. Shepard
    An Integrated Four-Phase Buck Converter Delivering 1A/mm2 with 700ps Controller Delay and Network-on-Chip Load in 45-nm SOI
    The Proceedings of the Custom Integrated Circuits Conference (CICC), 2011.

  14. H-Y. Liu, I. Diakonikolas, M. Petracca and L.P. Carloni
    Supervised Design Space Exploration by Compositional Approximation of Pareto Sets
    The Proceedings of the Design Automation Conference (DAC), 2011.

    Programming of Multi-Core Platforms

  15. R. Collins and L. P. Carloni
    Flexible Filters for High-Performance Embedded Computing
    Proceedings of the Fourteenth Annual Workshop on High Performance Embedded Computing (HPEC), 2010.

  16. R. Collins, B. Vellore, and L.P. Carloni
    Recursion-Driven Parallel Code Generation for Multi-Core Platforms
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2010.

  17. R. Collins and L.P. Carloni
    Flexible Filters: Load Balancing through Backpressure for Stream Programs
    Proceedings of the Ninth International Conference on Embedded Software (EMSOFT), 2009.

    Embedded Software & Heterogeneous System Modeling

  18. M. Szczodrak, Y. Yang, D. Cavalcanti, and L. P. Carloni
    An Open Framework to Deploy Heterogeneous Wireless Testbeds for Cyber-Physical Systems
    The Proceedings of the IEEE Symposium on Industrial Embedded Systems (SIES), 2013.

  19. Y. Jung, J. Park, M. Petracca, and L. P. Carloni
    netShip: A Networked Virtual Platform for Large-Scale Heterogeneous Distributed Embedded System
    The Proceedings of the Design Automation Conference (DAC), 2013.

  20. M. Szczodrak, O. Gnawali, and L. P. Carloni
    Dynamic Reconfiguration of Wireless Sensor Networks to Support Heterogeneous Applications
    The Proceedings of the IEEE International Conference on Distributed Computing in Sensor Systems (DCOSS), 2013.

  21. Y. Jung, R. Neill and L. P. Carloni
    A Broadband Embedded Computing System for MapReduce Utilizing Hadoop
    IEEE International Conference on Cloud Computing Technology and Science (CloudCom), 2012. (Best Paper Award).

  22. R. Neill, L. P. Carloni, A. Shabarshin, V. Sigaev, and S. Tcherepanov
    Embedded Processor Virtualization for Broadband Grid Computing
    The Proceedings of the 12th IEEE/ACM International Conference on Grid Computing (Grid), 2011.

  23. F. Leonardi, A. Pinto, and L.P. Carloni
    Synthesis of Distributed Execution Platforms for Cyber-Physical Systems with Applications to High-Performance Buildings
    The Proceedings of the ACM/IEEE Second International Conference on Cyber-Physical Systems (ICCPS), 2011.

  24. R. Neill, A. Shabarshin, and L. P. Carloni
    A Heterogeneous Parallel System Running Open MPI on a Broadband Network of Embedded Set-Top Devices
    ACM International Conference on Computing Frontiers (CF), 2010.

  25. F. Leonardi, A. Pinto, and L.P. Carloni
    A Case Study in Distributed Deployment of Embedded Software for Camera Networks
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2009.

  26. A. Pinto, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    A Communication Synthesis Infrastructure for Heterogeneous Networked Control Systems and its Application to Building Automation and Control
    Proceedings of the Seventh International Conference on Embedded Software (EMSOFT), 2007.

  27. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, A.L. Sangiovanni-Vincentelli, and S. Tripakis
    Communication by Sampling in Time-Sensitive Distributed Systems
    Proceedings of the Sixth International Conference on Embedded Software (EMSOFT), 2006

  28. A. Pinto, L. P. Carloni, R. Passerone, and A. Sangiovanni-Vincentelli
    Interchange Formats for Hybrid Systems: Abstract Semantics
    Proceedings of the Ninth International Workshop on Hybrid Systems : Computation and Control (HSCC), 2006 (to appear). LNCS 3927, © Springer-Verlag, 2006

  29. A. Bonivento, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Platform-Based Design of Wireless Sensor Networks for Industrial Applications
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2006.

  30. A. Benveniste, B. Caillaud, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Tag Machines
    Proceedings of the Fifth International Conference on Embedded Software (EMSOFT), 2005

  31. A. Bonivento, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Rialto: a Bridge between Description and Implementation of Control Algorithms for Wireless Sensor Networks
    Proceedings of the Fifth International Conference on Embedded Software (EMSOFT), 2005

  32. A. Pinto, A. Sangiovanni-Vincentelli, L. P. Carloni, and R. Passerone
    Interchange Formats for Hybrid Systems: Review and Proposal
    Proceedings of the Eight International Workshop on Hybrid Systems : Computation and Control (HSCC), 2005. LNCS 3414, © Springer-Verlag, 2005

  33. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Heterogeneous Reactive Systems Modeling: Capturing Causality and the Correctness of Loosely Time-Triggered Architectures (LTTA)
    Proceedings of the Fourth International Conference on Embedded Software (EMSOFT), 2004

  34. C. Pinello, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Fault-Tolerant Deployment of Embedded Software for Cost-Sensitive Real-Time Feedback-Control Applications
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2004.

  35. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Causality and Scheduling Constraints in Heterogeneous Reactive Systems Modeling
    Proceedings of the Second International Symposium (FMCO'03), LNCS 3188, © Springer-Verlag, 2004

  36. A. Benveniste, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Heterogeneous Reactive Systems Modeling and Correct-by-Construction Deployment
    Proceedings of the Third International Conference on Embedded Software (EMSOFT), LNCS 2855, © Springer-Verlag, 2003

  37. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    A Formal Modeling Framework for Deploying Synchronous Designs on Distributed Architectures
    First International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Architectures (FMGALS 2003).

    On-Chip Communication Synthesis and Networks-on-Chip

  38. Y.J. Yoon, N. Concer and L. P. Carloni
    VENTTI: a Vertically Integrated Framework for Simulation and Optimization of Networks-On-Chip
    IEEE International System-on-Chip Conference, 2012.

  39. Y.J. Yoon, N. Concer, M. Petracca, and L. P. Carloni
    Virtual Channels vs. Multiple Physical Networks: A Comparative Analysis
    The Proceedings of the Design Automation Conference (DAC), 2010.

  40. N. Concer, L. Bononi, M. Soulie, R. Locatelli and L.P. Carloni
    CTC: An End-To-End Flow Control Protocol for Multi-Core Systems-on-Chip
    Proceedings of the Third International Symposium on Networks-on-Chips (NOCS), 2009.

  41. N. Concer, M. Petracca, and L.P. Carloni
    Distributed Flit-Buffer Flow Control for Networks-on-Chip
    The Proceedings of the Sixth International Conference on Hardware/Software Codesign & System Synthesis (CODES+ISSS), 2008.

  42. L. P. Carloni, A. B. Kahng., S. Muddu. A. Pinto, K. Samadi, and P. Sharma
    Interconnect Modeling for Improved System-Level Design Optimization
    Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2008.

  43. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    On-Chip Communication Design: Roadblocks and Avenues
    (Extended Abstract for Invited Talk). The Proceedings of the First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis (CODES-ISSS), 2003.

  44. A. Pinto, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Efficient Synthesis of Networks On Chip
    Proceedings of the International Conference on Computer Design (ICCD), 2003.

  45. A. Pinto, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Constraint-Driven Communication Synthesis
    The Proceedings of the Design Automation Conference (DAC), 2002.

    Chip-Scale Photonic Interconnection Networks

  46. D. Whelihan, J. Hughes, S. Sawyer, E. Robinson, M. Wolf, S. Mohindra, J. Mullen, A. Klein, M. S. Beard, N. Bliss, J. Chan, R. Hendry, K. Bergman and L. Carloni
    P-sync: A Photonically Enabled Architecture for Efficient Non-Local Data Access
    IEEE International Parallel & Distributed Processing Symposium (IPDPS), 2013

  47. L. Ramini, D. Bertozzi, and L. P. Carloni
    Engineering a Bandwidth-Scalable Optical Layer for a 3D Multi-Core Processor with Awareness of Layout Constraints
    Proceedings of the Third International Symposium on Networks-on-Chip (NOCS), 2012.

  48. G. Hendry, J. Chan, L. P. Carloni, and K. Bergman
    VANDAL: A Tool for the Design Specification of Nanophotonic Networks
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2011.

  49. G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman
    Circuit-Switched Memory Access in Photonic Interconnection Networks for High-Performance Embedded Computing
    The Proceedings of the ACM/IEEE Conference on High Performance Computing (SC), 2010.

  50. G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. P. Carloni and K. Bergman
    Silicon Nanophotonic Network-On-Chip using TDM Arbitration
    18th Annual IEEE Symposium on High-Performance Interconnects (HotI), 2010.

  51. J. Chan, G. Hendry, A. Biberman, K. Bergman and L.P. Carloni
    PhoenixSim: A Simulator for Physical-Layer Analysis of Chip-Scale Photonic Interconnection Networks
    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2010.

  52. G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L.P. Carloni, J. Kubiatowicz, L. Oliker and J. Shalf
    Analysis of Photonic Networks for a Chip Multi-Processor Using Scientific Applications
    Proceedings of the Third International Symposium on Networks-on-Chip (NOCS), 2009.

  53. L.P. Carloni, P. Pande and Y. Xie
    Networks-on-Chip in Emerging Interconnect Paradigms: Advantages and Challenges
    Proceedings of the Third International Symposium on Networks-on-Chip (NOCS), 2009.

  54. N. Bliss, K. Asanovic, K. Bergman, L. Carloni, J. Kepner, and V. Stojanovic
    Photonic Many-Core Architecture Study
    Proceedings of the Twelfth Annual Workshop on High Performance Embedded Computing (HPEC), 2008.

  55. M. Petracca, B. G. Lee, K. Bergman and L.P. Carloni
    Design Exploration of Optical Interconnection Networks for Chip Multiprocessors
    16th Annual IEEE Symposium on High-Performance Interconnects (HotI), 2008.

  56. M. Petracca, K. Bergman and L.P. Carloni
    Photonic Networks-on-Chip: Opportunities and Challenges
    (Invited Paper). Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), 2008.

  57. H. Wang, M. Petracca, A. Biberman, B. G. Lee, L.P. Carloni and K. Bergman
    Nanophotonic Optical Interconnection Network Architecture for On-Chip and Off-Chip Communications
    Proceedings of the Optical Fiber Communication / National Fiber Optic Engineers Conference (OFC/NFOEC), 2008.

  58. K. Bergman and L.P. Carloni
    On-Chip Photonic Communication for High-Performance Multi-Core Processors
    Proceedings of the Eleventh Annual Workshop on High Performance Embedded Computing (HPEC), 2007. (Best Paper Award).

  59. A. Shacham, B. G. Lee, A. Biberman, K. Bergman and L. P. Carloni
    Photonic NoC for DMA Communications in Chip Multiprocessors
    15th Annual IEEE Symposium on High-Performance Interconnects, 2007.

  60. A. Shacham, K. Bergman, and L. P. Carloni
    The Case for Low-Power Photonic Networks on Chip
    The Proceedings of the Design Automation Conference (DAC), 2007.

  61. A. Shacham, K. Bergman, and L. P. Carloni
    On the Design of a Photonic Network-on-Chip
    Proceedings of the First International Symposium on Networks-on-Chips (NOCS), 2007.

  62. A. Shacham, K. Bergman, and L. P. Carloni
    Maximizing GFLOPS-per-Watt: High-Bandwidth, Low Power Photonic On-Chip Networks
    Proceedings of the Third Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=ac^2), 2006.

    Platform-Based Design

  63. A.L. Sangiovanni-Vincentelli, L.P. Carloni, F. De Bernardinis, and M. Sgroi
    Benefits and Challenges of Platform-Based Design
    (Invited Paper). The Proceedings of the Design Automation Conference, 2004.

  64. L.P. Carloni, F. De Bernardinis, A.L. Sangiovanni-Vincentelli, and M. Sgroi
    The Art and Science of Integrated Systems Design
    (Invited Paper). The Proceedings of the 28th European Solid-State Circuits Conference, 2002.
    Published also in The Proceedings of the 32th European Solid-State Device Research Conference, 2002.

    Combinatorial Optimization

  65. L.P. Carloni, E.I. Goldberg, T. Villa, R.K. Brayton, and A.L. Sangiovanni-Vincentelli
    Aura II: Combining Negative Thinking and Branch-and-Bound in Unate Covering Problems
    In "VLSI: Systems on a Chip" (L.M. Silveira, R. Reis, S. Devadas editors), Kluwer 1999.

  66. E.I. Goldberg, L.P. Carloni, T. Villa, R.K. Brayton, and A.L. Sangiovanni-Vincentelli
    Negative Thinking in Search Methods: Application to Unate Covering
    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 1997.

    Logic Synthesis and Optimization

  67. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits
    Proceedings of the 16th Symposium on Integrated Circuits and System Design, SBCCI 2003.

  68. L.P. Carloni, P. McGeer, A. Saldanha, and A.L. Sangiovanni-Vincentelli
    Trace-Driven Logic Synthesis: Application to Power Minimization
    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 1997.

  69. A.L. Oliveira, L.P. Carloni, T. Villa, and A.L. Sangiovanni-Vincentelli
    An Implicit Formulation for Exact BDD Minimization of Incompletely Specified Functions
    in "VLSI: Integrated Systems on Silicon" (R. Reis and L. Claesen editors), Chapman-Hall 1997.

    CAD for Mixed-Signal Design

  70. S. Zanella, A. Neviani, E. Zanoni, E. Charbon, P. Miliozzi, C. Guardiani, L.P. Carloni, and A. L. Sangiovanni-Vincentelli
    Modeling of Substrate Noise Injected by Digital Libraries
    Proc. Int. Symp. Quality Electronic Design, San Jose, CA, March 2001.

  71. P. Miliozzi, L.P. Carloni, E. Charbon, and A.L. Sangiovanni-Vincentelli
    SubWave: a Methodology for Modeling Digital Substrate Noise Injection in Mixed-Signal ICs    .
    Proceedings of the IEEE 1996 Custom Integrated Circuit Conference (CICC).