Conference (and Refereed Symposium/Workshop) Papers

    Latency-Insensitive Design

  1. C.-H. Li, S. Sonalkar, and L.P. Carloni
    Exploiting Local Logic Structures to Optimize Multi-Core SoC Floorplanning

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2010.

  2. C.-H. Li and L.P. Carloni
    Using Functional Independence Conditions to Optimize the Performance of Latency-Insensitive Systems

    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 2007.

  3. R. Collins and L. P. Carloni
    Topology-Based Optimization of Maximal Sustainable Throughput in a Latency-Insensitive System

    The Proceedings of the Design Automation Conference (DAC), 2007.

  4. C.H. Li, R. Collins, S. Sonalkar and L. P. Carloni
    Design, Implementation, and Validation of a New Class of Interface Circuits for Latency-Insensitive Design

    Fifth ACM-IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE), 2007.

  5. L.P. Carloni
    The Role of Back-Pressure in Implementing Latency-Insensitive Systems

    Electronic Notes in Theoretical Computer Science ENTCS 146-2, Vol. 146, No. 2, January 2006

  6. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Performance Analysis and Optimization of Latency-Insensitive Systems

    The Proceedings of the Design Automation Conference (DAC), 2000.

  7. L.P. Carloni, K.L. McMillan, A. Saldanha, and A.L. Sangiovanni-Vincentelli
    A Methodology for Correct-by-Construction Latency-Insensitive Design

    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 1999.

  8. L.P. Carloni, K.L. McMillan, and A.L. Sangiovanni-Vincentelli
    Latency-Insensitive Protocols

    In N. Halbwachs and D. Peled, editors, Proc. of the 11th Intl. Conf. on Computer-Aided Verification (CAV), LNCS 1633, © Springer-Verlag, 1999

    System-Level Design

  9. C. Pilato and L. P. Carloni
    DarkMem: Fine-Grained Power Management of Local Memories for Accelerators in Embedded Systems

    Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2018.

  10. L. Piccolboni, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    COSMOS: Coordination of High-Level Synthesis and Memory Optimization for Hardware Accelerators

    The Proceedings of the International Conference on Hardware/Software Codesign & System Synthesis (CODES+ISSS), 2017.

  11. E. G. Cota, P. Bonzini, A. Bennée, and L. P. Carloni
    Cross-ISA Machine Emulation for Multicores

    The Proceedings of the International Symposium on Code Generationand Optimization (CGO), 2017.

  12. L. Piccolboni, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    Broadening the Exploration of the Accelerator Design Space in Embedded Scalable Platforms

    Proceedings of the Twenty-First Annual Conference on High Performance Extreme Computing (HPEC), 2017.

  13. P. Mantovani, E. Cota, C. Pilato, G. Di Guglielmo and L. P. Carloni
    Handling Large Data Sets for High-Performance Embedded Applications in Heterogeneous Systems-on-Chip

    The Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2016.

  14. L. P. Carloni
    The Case for Embedded Scalable Platforms

    (Invited Paper). The Proceedings of the Design Automation Conference (DAC), 2016.

  15. P. Mantovani, E. Cota, K. Tien, C. Pilato, G. Di Guglielmo, K. Shepard and L. P. Carloni
    An FPGA-Based Infrastructure for Fine-Grained DVFS Analysis in High-Performance Embedded Systems

    The Proceedings of the Design Automation Conference (DAC), 2016.

  16. E. G. Cota, P. Mantovani, and L. P. Carloni
    Exploiting Private Local Memories to Reduce the Opportunity Cost of Accelerator Integration

    The Proceedings of the International Conference on Supercomputing (ICS), 2016.

  17. C. Pilato, Q. Xu, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    On the Design of Scalable and Reusable Accelerators for Big Data Applications

    (Invited Paper). Workshop on Big Data Analytics, co-located with ACM International Conference on Computing Frontiers (CF), 2016.

  18. P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    High-Level Synthesis of Accelerators in Embedded Scalable Platforms

    (Invited Paper). Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2016.

  19. D. Jahier Pagliari, A. Pulimeno, J. A. Tobon, M. Vacca, F. Vipiana, M. R. Casu, R. Solimene, and L. P. Carloni
    A Low-Cost, Fast, and Accurate Microwave Imaging System for Breast Cancer Detection

    Biomedical Circuits and Systems Conference (BioCAS), 2015.

  20. D. Jahier Pagliari, M. R. Casu, and L. P. Carloni
    Acceleration of Microwave Imaging Algorithms for Breast Cancer Detection via High-Level Synthesis

    The Proceedings of the International Conference on Computer Design (ICCD), 2015.

  21. K. Tien, N. Sturcken, N. Wang, J.-W. Nah, B. Dang, E. O'Sullivan, P. Andry, M. Petracca, L. P. Carloni, W. Gallagher, and K. Shepard
    An 82%-Efficient Multiphase Voltage-Regulator 3D Interposer with On-Chip Magnetic Inductors

    Symposium on VLSI Circuits, 2015.

  22. E. G. Cota, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    An Analysis of Accelerator Coupling in Heterogeneous Architectures

    The Proceedings of the Design Automation Conference (DAC), 2015.

  23. Y. Jung and L. P. Carloni
    ΣVP: Host-GPU Multiplexing for Efficient Simulation of Multiple Embedded GPUs on Virtual Platforms

    The Proceedings of the Design Automation Conference (DAC), 2015.

  24. C. Pilato, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    System-Level Memory Optimization for High-Level Synthesis of Component-Based SoCs

    The Proceedings of the International Conference on Hardware/Software Codesign & System Synthesis (CODES+ISSS), 2014.

  25. G. Di Guglielmo, C. Pilato, and L. P. Carloni
    A Design Methodology for Compositional High-Level Synthesis of Communication-Centric SoCs

    The Proceedings of the Design Automation Conference (DAC), 2014.

  26. H.-Y. Liu and L.P. Carloni
    On Learning-Based Methods for Design-Space Exploration with High-Level Synthesis

    The Proceedings of the Design Automation Conference (DAC), 2013.

  27. N. Bombieri, H.-Y. Liu, F. Fummi, and L.P. Carloni
    A Method to Abstract RTL IP Blocks into C++ Code and Enable High-Level Synthesis

    The Proceedings of the Design Automation Conference (DAC), 2013.

  28. H.-Y. Liu, M. Petracca, and L.P. Carloni
    Compositional System-Level Design Exploration with Planning of High-Level Synthesis

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2012. (Best Paper Award).

  29. N. Sturcken, E. J. O'Sullivan, N. Wang, P. Herget, B. Webb, L. T. Romankiw, M. Petracca, R. Davies, R. Fontana, G. M. Decad, I. Kymissis, A. V. Peterchev, L.P. Carloni, W.J. Gallagher, and K.L. Shepard
    A 2.5D Integrated Voltage Regulator Using Coupled Magnetic Core Inductors on Silicon Interposer Delivering 10.8A/mm2

    International Solid-State Circuits Conference (ISSCC), 2012.

  30. N. Sturcken, M. Petracca, S. Warren, L.P. Carloni, A.V. Peterchev, and K.L. Shepard
    An Integrated Four-Phase Buck Converter Delivering 1A/mm2 with 700ps Controller Delay and Network-on-Chip Load in 45-nm SOI

    The Proceedings of the Custom Integrated Circuits Conference (CICC), 2011.

  31. H-Y. Liu, I. Diakonikolas, M. Petracca and L.P. Carloni
    Supervised Design Space Exploration by Compositional Approximation of Pareto Sets

    The Proceedings of the Design Automation Conference (DAC), 2011.

    Programming of Multi-Core Platforms

  32. R. Collins and L. P. Carloni
    Flexible Filters for High-Performance Embedded Computing

    Proceedings of the Fourteenth Annual Workshop on High Performance Embedded Computing (HPEC), 2010.

  33. R. Collins, B. Vellore, and L.P. Carloni
    Recursion-Driven Parallel Code Generation for Multi-Core Platforms

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2010.

  34. R. Collins and L.P. Carloni
    Flexible Filters: Load Balancing through Backpressure for Stream Programs

    Proceedings of the Ninth International Conference on Embedded Software (EMSOFT), 2009.

    Embedded Software & Heterogeneous System Modeling

  35. Y. Jung, J. Koo, K. Stratos, and L. P. Carloni
    A Probabilistic Ranking Model for Audio Stream Retrieval

    International Workshop on Multimedia Analysis and Retrieval for Multimodal Interaction (MARMI), 2016.

  36. Y. Jung, K. Stratos, and L. P. Carloni
    LN-Annote: An Alternative Approach to Information Extraction from Emails using Locally-Customized Named-Entity Recognition

    The Proceedings of the International World Wide Web Conference (WWW), 2015.

  37. J. Brooks, S. Goyal, R. Subramany, Y. Lin, T. Middelkoop, L. Arpan, L. Carloni, and P. Barooah
    An Experimental Investigation of Real-Time, Occupancy-Based Control of Commercial Building Climate

    IEEE Conference on Decision and Control (CDC), 2014

  38. M. Szczodrak, O. Gnawali, and L. P. Carloni
    Modeling and Implementation of Energy Neutral Sensing Systems

    The Proceedings of the 1st International Workshop on Energy Neutral Sensing Systems (ENSSyS), 2013.

  39. M. Szczodrak, Y. Yang, D. Cavalcanti, and L. P. Carloni
    An Open Framework to Deploy Heterogeneous Wireless Testbeds for Cyber-Physical Systems

    The Proceedings of the IEEE Symposium on Industrial Embedded Systems (SIES), 2013.

  40. M. Gorlatova, R. Margolies, J. Sarik, G. Stanje, J. Zhu, B. Vigraham, M. Szczodrak, L. P. Carloni, P. R. Kinget, I. Kymissis, and G. Zussman
    Prototyping Energy Harvesting Active Networked Tags (EnHANTs)

    Proceedings of the IEEE INFOCOM Mini-Conference, 2013.

  41. Y. Jung, J. Park, M. Petracca, and L. P. Carloni
    netShip: A Networked Virtual Platform for Large-Scale Heterogeneous Distributed Embedded System

    The Proceedings of the Design Automation Conference (DAC), 2013.

  42. M. Szczodrak, O. Gnawali, and L. P. Carloni
    Dynamic Reconfiguration of Wireless Sensor Networks to Support Heterogeneous Applications

    The Proceedings of the IEEE International Conference on Distributed Computing in Sensor Systems (DCOSS), 2013.

  43. Y. Jung, R. Neill and L. P. Carloni
    A Broadband Embedded Computing System for MapReduce Utilizing Hadoop

    IEEE International Conference on Cloud Computing Technology and Science (CloudCom), 2012. (Best Paper Award).

  44. R. Neill, L. P. Carloni, A. Shabarshin, V. Sigaev, and S. Tcherepanov
    Embedded Processor Virtualization for Broadband Grid Computing

    The Proceedings of the 12th IEEE/ACM International Conference on Grid Computing (Grid), 2011.

  45. F. Leonardi, A. Pinto, and L.P. Carloni
    Synthesis of Distributed Execution Platforms for Cyber-Physical Systems with Applications to High-Performance Buildings

    The Proceedings of the ACM/IEEE Second International Conference on Cyber-Physical Systems (ICCPS), 2011.

  46. R. Neill, A. Shabarshin, and L. P. Carloni
    A Heterogeneous Parallel System Running Open MPI on a Broadband Network of Embedded Set-Top Devices

    ACM International Conference on Computing Frontiers (CF), 2010.

  47. F. Leonardi, A. Pinto, and L.P. Carloni
    A Case Study in Distributed Deployment of Embedded Software for Camera Networks

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2009.

  48. A. Pinto, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    A Communication Synthesis Infrastructure for Heterogeneous Networked Control Systems and its Application to Building Automation and Control

    Proceedings of the Seventh International Conference on Embedded Software (EMSOFT), 2007.

  49. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, A.L. Sangiovanni-Vincentelli, and S. Tripakis
    Communication by Sampling in Time-Sensitive Distributed Systems

    Proceedings of the Sixth International Conference on Embedded Software (EMSOFT), 2006

  50. A. Pinto, L. P. Carloni, R. Passerone, and A. Sangiovanni-Vincentelli
    Interchange Formats for Hybrid Systems: Abstract Semantics

    Proceedings of the Ninth International Workshop on Hybrid Systems : Computation and Control (HSCC), 2006 (to appear). LNCS 3927, © Springer-Verlag, 2006

  51. A. Bonivento, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Platform-Based Design of Wireless Sensor Networks for Industrial Applications

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2006.

  52. A. Pinto, L. P. Carloni, R. Passerone, and A. Sangiovanni-Vincentelli
    Interchange Semantics for for Hybrid System Models

    Proceedings of the Fifth MATHMOD, Vienna 2006.

  53. A. Benveniste, B. Caillaud, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Tag Machines

    Proceedings of the Fifth International Conference on Embedded Software (EMSOFT), 2005

  54. A. Bonivento, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Rialto: a Bridge between Description and Implementation of Control Algorithms for Wireless Sensor Networks

    Proceedings of the Fifth International Conference on Embedded Software (EMSOFT), 2005

  55. A. Pinto, A. Sangiovanni-Vincentelli, L. P. Carloni, and R. Passerone
    Interchange Formats for Hybrid Systems: Review and Proposal

    Proceedings of the Eight International Workshop on Hybrid Systems : Computation and Control (HSCC), 2005. LNCS 3414, © Springer-Verlag, 2005

  56. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Heterogeneous Reactive Systems Modeling: Capturing Causality and the Correctness of Loosely Time-Triggered Architectures (LTTA)

    Proceedings of the Fourth International Conference on Embedded Software (EMSOFT), 2004

  57. C. Pinello, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Fault-Tolerant Deployment of Embedded Software for Cost-Sensitive Real-Time Feedback-Control Applications

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2004.

  58. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Causality and Scheduling Constraints in Heterogeneous Reactive Systems Modeling

    Proceedings of the Second International Symposium (FMCO'03), LNCS 3188, © Springer-Verlag, 2004

  59. A. Benveniste, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Heterogeneous Reactive Systems Modeling and Correct-by-Construction Deployment

    Proceedings of the Third International Conference on Embedded Software (EMSOFT), LNCS 2855, © Springer-Verlag, 2003

  60. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    A Formal Modeling Framework for Deploying Synchronous Designs on Distributed Architectures

    First International Workshop on Formal Methods for Globally Asynchronous Locally Synchronous Architectures (FMGALS 2003).

    On-Chip Communication Synthesis and Networks-on-Chip

  61. Y.J. Yoon, P. Mantovani and L. P. Carloni
    System-Level Design of Networks-on-Chip for Systems-on-Chip

    (Invited Paper). Proceedings of the Eleventh International Symposium on Networks-on-Chip (NOCS), 2017.os

  62. Y.J. Yoon, N. Concer and L. P. Carloni
    VENTTI: a Vertically Integrated Framework for Simulation and Optimization of Networks-On-Chip

    IEEE International System-on-Chip Conference, 2012.

  63. Y.J. Yoon, N. Concer, M. Petracca, and L. P. Carloni
    Virtual Channels vs. Multiple Physical Networks: A Comparative Analysis

    The Proceedings of the Design Automation Conference (DAC), 2010.

  64. N. Concer, L. Bononi, M. Soulie, R. Locatelli and L.P. Carloni
    CTC: An End-To-End Flow Control Protocol for Multi-Core Systems-on-Chip

    Proceedings of the Third International Symposium on Networks-on-Chips (NOCS), 2009.

  65. N. Concer, M. Petracca, and L.P. Carloni
    Distributed Flit-Buffer Flow Control for Networks-on-Chip

    The Proceedings of the Sixth International Conference on Hardware/Software Codesign & System Synthesis (CODES+ISSS), 2008.

  66. L. P. Carloni, A. B. Kahng., S. Muddu. A. Pinto, K. Samadi, and P. Sharma
    Interconnect Modeling for Improved System-Level Design Optimization

    Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2008.

  67. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    On-Chip Communication Design: Roadblocks and Avenues

    (Extended Abstract for Invited Talk). The Proceedings of the First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign & System Synthesis (CODES-ISSS), 2003.

  68. A. Pinto, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Efficient Synthesis of Networks On Chip

    Proceedings of the International Conference on Computer Design (ICCD), 2003.

  69. A. Pinto, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Constraint-Driven Communication Synthesis

    The Proceedings of the Design Automation Conference (DAC), 2002.

    Chip-Scale Photonic Interconnection Networks

  70. D. Whelihan, J. Hughes, S. Sawyer, E. Robinson, M. Wolf, S. Mohindra, J. Mullen, A. Klein, M. S. Beard, N. Bliss, J. Chan, R. Hendry, K. Bergman and L. Carloni
    P-sync: A Photonically Enabled Architecture for Efficient Non-Local Data Access

    IEEE International Parallel & Distributed Processing Symposium (IPDPS), 2013

  71. L. Ramini, D. Bertozzi, and L. P. Carloni
    Engineering a Bandwidth-Scalable Optical Layer for a 3D Multi-Core Processor with Awareness of Layout Constraints
    Proceedings of the Third International Symposium on Networks-on-Chip (NOCS), 2012.

  72. G. Hendry, J. Chan, L. P. Carloni, and K. Bergman
    VANDAL: A Tool for the Design Specification of Nanophotonic Networks

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2011.

  73. G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman
    Circuit-Switched Memory Access in Photonic Interconnection Networks for High-Performance Embedded Computing

    The Proceedings of the ACM/IEEE Conference on High Performance Computing (SC), 2010.

  74. G. Hendry, J. Chan, S. Kamil, L. Oliker, J. Shalf, L. P. Carloni and K. Bergman
    Silicon Nanophotonic Network-On-Chip using TDM Arbitration

    18th Annual IEEE Symposium on High-Performance Interconnects (HotI), 2010.

  75. J. Chan, G. Hendry, A. Biberman, K. Bergman and L.P. Carloni
    PhoenixSim: A Simulator for Physical-Layer Analysis of Chip-Scale Photonic Interconnection Networks

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2010.

  76. G. Hendry, S. Kamil, A. Biberman, J. Chan, B. Lee, M. Mohiyuddin, A. Jain, K. Bergman, L.P. Carloni, J. Kubiatowicz, L. Oliker and J. Shalf
    Analysis of Photonic Networks for a Chip Multi-Processor Using Scientific Applications

    Proceedings of the Third International Symposium on Networks-on-Chip (NOCS), 2009.

  77. L.P. Carloni, P. Pande and Y. Xie
    Networks-on-Chip in Emerging Interconnect Paradigms: Advantages and Challenges

    Proceedings of the Third International Symposium on Networks-on-Chip (NOCS), 2009.

  78. N. Bliss, K. Asanovic, K. Bergman, L. Carloni, J. Kepner, and V. Stojanovic
    Photonic Many-Core Architecture Study

    Proceedings of the Twelfth Annual Workshop on High Performance Embedded Computing (HPEC), 2008.

  79. M. Petracca, B. G. Lee, K. Bergman and L.P. Carloni
    Design Exploration of Optical Interconnection Networks for Chip Multiprocessors

    16th Annual IEEE Symposium on High-Performance Interconnects (HotI), 2008.

  80. M. Petracca, K. Bergman and L.P. Carloni
    Photonic Networks-on-Chip: Opportunities and Challenges

    (Invited Paper). Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), 2008.

  81. H. Wang, M. Petracca, A. Biberman, B. G. Lee, L.P. Carloni and K. Bergman
    Nanophotonic Optical Interconnection Network Architecture for On-Chip and Off-Chip Communications

    Proceedings of the Optical Fiber Communication / National Fiber Optic Engineers Conference (OFC/NFOEC), 2008.

  82. K. Bergman and L.P. Carloni
    On-Chip Photonic Communication for High-Performance Multi-Core Processors

    Proceedings of the Eleventh Annual Workshop on High Performance Embedded Computing (HPEC), 2007. (Best Paper Award).

  83. A. Shacham, B. G. Lee, A. Biberman, K. Bergman and L. P. Carloni
    Photonic NoC for DMA Communications in Chip Multiprocessors

    15th Annual IEEE Symposium on High-Performance Interconnects, 2007.

  84. A. Shacham, K. Bergman, and L. P. Carloni
    The Case for Low-Power Photonic Networks on Chip

    The Proceedings of the Design Automation Conference (DAC), 2007.

  85. A. Shacham, K. Bergman, and L. P. Carloni
    On the Design of a Photonic Network-on-Chip

    Proceedings of the First International Symposium on Networks-on-Chips (NOCS), 2007.

  86. A. Shacham, K. Bergman, and L. P. Carloni
    Maximizing GFLOPS-per-Watt: High-Bandwidth, Low Power Photonic On-Chip Networks

    Proceedings of the Third Watson Conference on Interaction between Architecture, Circuits, and Compilers (P=ac^2), 2006.

    Platform-Based Design

  87. A.L. Sangiovanni-Vincentelli, L.P. Carloni, F. De Bernardinis, and M. Sgroi
    Benefits and Challenges of Platform-Based Design

    (Invited Paper). The Proceedings of the Design Automation Conference, 2004.

  88. L.P. Carloni, F. De Bernardinis, A.L. Sangiovanni-Vincentelli, and M. Sgroi
    The Art and Science of Integrated Systems Design

    (Invited Paper). The Proceedings of the 28th European Solid-State Circuits Conference, 2002.
    Published also in The Proceedings of the 32th European Solid-State Device Research Conference, 2002.

    Combinatorial Optimization

  89. L.P. Carloni, E.I. Goldberg, T. Villa, R.K. Brayton, and A.L. Sangiovanni-Vincentelli
    Aura II: Combining Negative Thinking and Branch-and-Bound in Unate Covering Problems

    In "VLSI: Systems on a Chip" (L.M. Silveira, R. Reis, S. Devadas editors), Kluwer 1999.

  90. E.I. Goldberg, L.P. Carloni, T. Villa, R.K. Brayton, and A.L. Sangiovanni-Vincentelli
    Negative Thinking in Search Methods: Application to Unate Covering

    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 1997.

    Logic Synthesis and Optimization

  91. M. M. Ziegler, H.-Y. Liu, and L. P. Carloni
    Scalable Auto-Tuning of Synthesis Parameters for Optimizing High-Performance Processors

    The Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2016.

  92. M. M. Ziegler, H.-Y. Liu, G. Gristede, B. Owens, R. Nigaglioni, and L. P. Carloni
    A Synthesis-Parameter Tuning System for Autonomous Design-Space Exploration

    The Proceedings of the Conference on Design, Automation and Test in Europe (DATE), 2016.

  93. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits

    Proceedings of the 16th Symposium on Integrated Circuits and System Design, SBCCI 2003.

  94. L.P. Carloni, P. McGeer, A. Saldanha, and A.L. Sangiovanni-Vincentelli
    Trace-Driven Logic Synthesis: Application to Power Minimization

    The Proceedings of the International Conference on Computer-Aided Design (ICCAD), 1997.

  95. A.L. Oliveira, L.P. Carloni, T. Villa, and A.L. Sangiovanni-Vincentelli
    An Implicit Formulation for Exact BDD Minimization of Incompletely Specified Functions

    in "VLSI: Integrated Systems on Silicon" (R. Reis and L. Claesen editors), Chapman-Hall 1997.

    CAD for Mixed-Signal Design

  96. S. Zanella, A. Neviani, E. Zanoni, E. Charbon, P. Miliozzi, C. Guardiani, L.P. Carloni, and A. L. Sangiovanni-Vincentelli
    Modeling of Substrate Noise Injected by Digital Libraries

    Proc. Int. Symp. Quality Electronic Design, San Jose, CA, March 2001.

  97. P. Miliozzi, L.P. Carloni, E. Charbon, and A.L. Sangiovanni-Vincentelli
    SubWave: a Methodology for Modeling Digital Substrate Noise Injection in Mixed-Signal ICs
    .
    Proceedings of the IEEE 1996 Custom Integrated Circuit Conference (CICC).