Two Columbia Engineering PhD students, João P. Cerqueira (Electrical Engineering) and Thomas J. Repetti (Computer Science), have been named recipients of the highly competitive $100,000 Qualcomm Innovation Fellowship (QInF) for their proposal to build a general-purpose chip that is fast, programmable, and energy-efficient. Advised by Mingoo Seok and Martha Kim, respectively, Cerqueira and Repetti are one of eight two-member teams to be awarded funding (out of 116 initial applications). This is the fifth year in a row that a Columbia team has earned the coveted fellowship.
Cerqueira and Repetti’s winning proposal, “A Programmable Spatial Architecture with Temporally/Spatially Fine-Grained Active Leakage Management for Energy-Efficient Near-Threshold-Voltage Computing,” aims to design a single chip combining programmability, energy efficiency, and high performance. It’s an ambitious undertaking considering that most chips are designed for one of these goals at a time.
For chip manufacturers like Qualcomm, the cost of designing and fabricating a variety of chips becomes costly. An architecture general enough for several types of workload that still attains the speed and efficiency of more specialized designs presents obvious cost efficiencies.
To design such a chip, Cerqueira and Repetti will employ a spatial architecture, where an array of discrete processing elements cooperate to speed the completion of a variety of workloads. Such processors take advantage the spatial structure of algorithms and can be reprogrammed to execute different tasks. To build an efficient design while maintaining this flexibility, Cerqueira and Repetti must tackle several problems. Among them:
- Giving each processing element—of which there can be hundreds—its own local, independent control logic, thus extracting higher performance from individual processing elements while allowing for each to receive different voltages depending on an element’s busy or idle status.
- Operating the chip at ultra-low voltage, near the minimum gate-source voltage required for a transistor to create a channel.
- Maximizing energy efficiency through a variety of architectural and circuit techniques.
That Cerqueira and Repetti propose to design and complete a “tapeout” (a photomask used as the basis for fabrication) within a year reveals the true extent of their ambitions. That they are still PhD students (Cerqueira is in his third year and Repetti in his second) does not concern their advisors.
“João and Tom are uniquely positioned to see this innovative—and important—research through to completion,” says Kim. “They already have extensive experience and accomplishments directly relevant to this new project.”
Cerqueira works with energy-efficient integrated circuits and systems. He proposed novel circuit techniques on leakage current suppression to maximize the energy efficiency of parallel architectures (this work was published in the IEEE Transactions on VLSI Systems). He also collaborated on two chip-design projects for brain computer interface systems, both of which were fabricated and described in two papers accepted to IEEE Symposium on VLSI Circuits. Last year, Cerqueira led and completed a chip design to demonstrate innovative techniques on leakage energy reduction (this work was accepted for publication in September’s European Solid-State Circuits Conference).
Repetti’s studies in digital design, systems programming, and computer architecture and his previous work experience in the industry (including interning at Intel where he worked on post-silicon validation and driver debugging) have allowed him to design his own ISA (instruction set architecture), implement a functional simulator, an assembler, an FPGA prototype, and a driver to program the prototype and dispatch jobs. The infrastructure and techniques he has developed for this project so far are currently under review for publication.
Together Cerqueira and Repetti have explored a range of logic- and circuit-level designs, honing in on one as the basis of their Qualcomm prototype. Their individual strengths and previous experience as a team no doubt played a role in their being selected for the fellowship.
“This work can potentially have a ground-breaking impact on the mobile and embedded systems, which look for a pathway to design a flexible yet energy-efficient computing platform for various digital signal processing and machine learning,” says Seok, advisor to Cerqueira. “Those two things, flexibility and energy-efficiency, are not easy to come by together, and we probably need holistic approaches like what João and Tom will pursue in this project. It was my pleasure to support this project and I very much look forward to monitoring their progress over the next year. “
In addition to the $100K funding, the fellowship provides mentoring from Qualcomm researchers who will also facilitate contacts between them and Qualcomm’s R&D department.
– Linda Crane