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| Prof. Steven Nowick | Prof. Stephen Unger | Montek Singh | Michael Theobald | Tiberiu Chelcea | Garry Channing |
The research of our group focuses on many aspects of asynchronous (and synchronous) digital design. Asynchronous, or self-timed, circuits are those which do not use a global clock. Recent research topics include: CAD tools and algorithms; the design of high-performance and low-power datapaths; controller-design; high-speed pipelines; design of interface circuits for mixed-clock and mixed asynchronous/synchronous systems; logic synthesis; and formal hardware verification.
Recent Announcements:
Asynchronous Design in the
News:
- "As Chips
Reach Speed Limit, Makers Tap Into 'Clockless' Logic",
International Herald Tribune, December 17, 2001.
(Article on the limitations of synchronous designs and the promises and
achievements of asynchronous design)
(Article on the limitations of synchronous designs and the promises and achievements of asynchronous design)
[Includes an interview with Prof. Nowick]
(Article on the promise of asynchronous design, with a focus on recent developments)
(Article on the goals and achievements of asynchronous design)
(NYT article on Ivan Sutherland's asynchronous design group at Sun Labs)
(Article on asynchronous logic being on its way to widespread adoption)
For an introduction to asynchronous design, read the following articles:
 | "An Introduction to Asynchronous Circuit Design," A. Davis and S.M. Nowick. Technical Report UUCS-97-013, Computer Science Department, University of Utah, Sep. 1997. [ps] [pdf] |
| "Scanning the Technology: Applications of Asynchronous Circuits," C.H. Van Berkel, M.B. Josephs, and S.M. Nowick. Proceedings of the IEEE, Volume 87, Issue 2, Feb. 1999, pages 223-233. [ps] [pdf] |
Related Sites:
| The Asynchronous Logic Home Page at University of Manchester |
| The "Async-2001" Symposium |