Journal Papers

  1. L. Piccolboni, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    COSMOS: Coordination of High-Level Synthesis and Memory Optimization for Hardware Accelerators

    ACM Transactions on Embedded Computing Systems, Vol. 16, No. 5s, September 2017.

  2. C. Pilato, P. Mantovani, G. Di Guglielmo, and L. P. Carloni
    System-Level Optimization of Accelerator Local Memory for Heterogeneous Systems-on-Chip

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 36, No. 3, March 2017.

  3. D. Jahier Pagliari, M. R. Casu, and L. P. Carloni
    Accelerators for Breast-Cancer Detection

    ACM Transactions on Embedded Computing Systems, Vol. 16, No. 3, March 2017.

  4. L.P. Carloni
    From Latency-Insensitive Design to Communication-Based System-Level Design

    The Proceedings of the IEEE, Vol. 103, No. 11, November 2015.

  5. R. K. Brayton, L. P. Carloni, A.L. Sangiovanni-Vincentelli, and T. Villa
    Design Automation of Electronic Systems: Past Accomplishments and Challenges Ahead [Scanning the Issue]

    The Proceedings of the IEEE, Vol. 103, No. 11, November 2015.

  6. R. Margolies, M. Gorlatova, J. Sarik, G. Stanje, J. Zhu, P. Miller, M. Szczodrak, B. Vigraham, L. Carloni, P. R. Kinget, I. Kymissis, and G. Zussman
    Energy Harvesting Active Networked Tags (EnHANTs): Prototyping and Experimentation

    ACM Transactions on Sensor Networks, Vol. 11, No. 4, November 2015.

  7. Y. Jung, M. Petracca, and L. P. Carloni
    Cloud-Aided Design for Distributed Embedded Systems

    IEEE Design & Test, Vol. 31, No. 4, July/August 2014.

  8. E. G. Cota, P. Mantovani, M. Petracca, M. R. Casu and L. P. Carloni
    Accelerator Memory Reuse in the Dark Silicon Era

    Computer Architecture Letters, Vol. 31, No. 1, January/June 2014.

  9. Y.J. Yoon, N. Concer, M. Petracca and L. P. Carloni
    Virtual Channels and Multiple Physical Networks: Two Alternatives to Improve NoC Performance

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 32, No. 12, December 2013.

  10. R. Collins and L.P. Carloni
    Flexible Filters in Stream Programs

    ACM Transactions on Embedded Computing Systems, Vol. 13, No. 3, December 2013.

  11. N. Sturcken, E. J. O'Sullivan, N. Wang, P. Herget, B. Webb, L. T. Romankiw, M. Petracca, R. Davies, R. Fontana, G. M. Decad, I. Kymissis, A. V. Peterchev, L.P. Carloni, W.J. Gallagher, and K.L. Shepard
    A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer

    IEEE Journal of Solid State Circuits, Vol. 48, No. 1, January 2013.

  12. N. Sturcken, M. Petracca, S. Warren, P. Mantovani, L.P. Carloni, A.V. Peterchev, and K.L. Shepard
    A Switched-Inductor Integrated Voltage Regulator with Nonlinear Feedback and NoC Load in 45nm SOI

    IEEE Journal of Solid State Circuits, Vol. 47, No. 8, August 2012.

  13. J. Chan, G. Hendry, K. Bergman, and L. P. Carloni
    Physical-Layer Modeling and System-Level Design of Chip-Scale Photonic Interconnection Networks

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 30, No. 10, October 2011.

  14. G. Hendry, E. Robinson, V. Gleyzer, J. Chan, L. P. Carloni, N. Bliss, and K. Bergman
    Time-Division-Multiplexed Arbitration in Silicon Nanophotonic Networks-On-Chip for High-Performance Chip Multiprocessors

    Journal of Parallel and Distributed Computing, Vol. 71, No. 5, May 2011.

  15. N. Concer, L. Bononi, M. Soulie, R. Locatelli, and L.P. Carloni
    The Connection-then-Credit Flow Control Protocol for Heterogeneous Multi-Core Systems-on-Chip

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 29, No. 6, June 2010.

  16. L. P. Carloni, A. B. Kahng., S. Muddu. A. Pinto, K. Samadi, and P. Sharma
    Accurate Predictive Interconnect Modeling for System-Level Design

    IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 18, No. 4, April 2010.

  17. M. Petracca, B. G. Lee, K. Bergman, and L.P. Carloni
    Photonic NoCs: System-Level Design Exploration

    IEEE Micro Special Issue: Top Picks from Hot Interconnects 16, Vol. 29, No. 4, July/August 2009.

  18. A. Pinto, L.P. Carloni, and A. Sangiovanni-Vincentelli
    A Methodology for Constraint-Driven Synthesis of On-Chip Communications

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 28, No. 3, March 2009.

  19. C.-H. Li and L.P. Carloni
    Leveraging Local Intra-Core Information to Increase Global Performance in Block-Based Design of Systems-on-Chip

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 28, No. 2, February 2009.

  20. R.L. Collins and L.P. Carloni
    Topology-Based Performance Analysis and Optimization of Latency-Insensitive Systems

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 27, No. 12, December 2008.

  21. A. Shacham, K. Bergman, and L. P. Carloni
    Photonic Networks-on-Chip for Future Generations of Chip Multi-Processors

    IEEE Transactions on Computers, Vol. 57, No. 9, September 2008.

  22. A. Pinto, L.P. Carloni, and A. Sangiovanni-Vincentelli
    COSI: A Framework for the Design of Interconnection Networks

    IEEE Design & Test of Computers. Vol. 25, No. 5, September/October 2008.

  23. A. Benveniste, B. Caillaud, L.P. Carloni, P. Caspi, and A.L. Sangiovanni-Vincentelli
    Composing Heterogeneous Reactive Systems

    ACM Transactions on Embedded Computing Systems, Vol. 7, No. 4, July 2008.

  24. C. Pinello, L.P. Carloni, and A.L. Sangiovanni-Vincentelli
    Fault-Tolerant Distributed Deployment of Embedded Control Software

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 27, No. 5, May 2008.

  25. A. Bonivento, L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Platform Based Design for Wireless Sensor Networks.

    in Mobile Networks & Applications, Vol. 11, No. 4, August 2006

  26. L.P. Carloni, R. Passerone, A. Pinto and A.L. Sangiovanni-Vincentelli
    Languages and Tools for Hybrid Systems Design

    in Foundations and Trends. in Electronic Design Automation, Vol. 1, No. 1/2, Jul 2006.

    A printed and bound version of this article is available at a 45% discount from Now Publishers. This can be obtained by entering the promotional code EDA001001 on the order form at now publishers. You will then pay only $66.00 including postage.

  27. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    A Framework for Modeling the Distributed Deployment of Synchronous Designs

    in Formal Methods in Systems Design - An International Journal, © Springer-Verlag, Vol. 28, No. 2, March 2006

  28. L.P. Carloni and A.L. Sangiovanni-Vincentelli
    Coping with Latency in SoC Design

    IEEE Micro, Special Issue on Systems on Chip. Vol. 22, No. 5, Sep/Oct 2002.

  29. L.P. Carloni, K.L. McMillan, and A.L. Sangiovanni-Vincentelli
    Theory of Latency-Insensitive Design

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. Vol. 20, No. 9, September 2001.

  30. E.I. Goldberg, L.P. Carloni, T. Villa, R. K. Brayton, and A.L. Sangiovanni-Vincentelli
    Negative Thinking in Branch-and-Bound: the Case of Unate Covering

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 19, No. 3, March 2000.

  31. E. Charbon, P. Miliozzi, L.P. Carloni, A. Ferrari, and A.L. Sangiovanni-Vincentelli
    Modeling Digital Substrate Noise Injection in Mixed-Signal ICs

    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 18, No. 3, March 1999.

  32. A.L. Oliveira, L.P. Carloni, T. Villa, and A.L. Sangiovanni-Vincentelli
    Exact Minimization of Binary Decision Diagrams Using Implicit Techniques

    IEEE Transactions on Computers, Vol. 47, No. 11, November 1998.