Fundamentals of Computer Systems
CSEE 3827, Fall 2015
Lectures will be held on TuTh 10:10am-11:25am in 501 Schermerhorn Hall.
- Prof. Martha Kim
Phone: (212) 939-7094
Office: 469 CSB
- David Arthur
- Gaurav Gite
- Adam Incera
- Chae Jubb
- Eashwar Rangarajan
- John Stanton
- Noah Stebbins
- Laura Tang
Upcoming Office Hours
Questions and Announcements
Please register for Piazza
, where you can ask technical questions, contact TAs, and receive course-wide announcements.
This course examines how the 1s and 0s that form the foundation of digital computing are organized, structured, and manipulated to produce full-fledged computer systems. In bridging this gap, the course will cover many subjects beginning with binary logic, combinatorial and sequential circuit design, memory structures, instruction set architectures, and, ultimately, basic processor design.
An introductory programming course, such as COMS 1004 or 1007. You need to understand the basics of imperative, sequential programming to understand the assembly language programming we will discuss.
Each homework assignment is due at at the beginning of lecture on the due date. Late submissions will not be accepted. We will drop each student's lowest homework grade when calculating final grades.
Collaboration and Academic Integrity
We take academic honesty extremely seriously, and expect the same of you. You may discuss homework problems with your classmates, however, each student is to write up his or her own solution and is expected to be able to explain and reproduce the work she or she submits. Please note the names of your collaborators at the top of your homework submission. Apart from these exceptions, the Computer Science Department's Academic Honesty policy
is in effect.
Top Five Homeworks: 40%
Exams: 30% + 30%
There are no required texts. Recommended texts are:
- Logic and Computer Design Fundamentals, 4th ed, by M. Morris Mano and Charles Kime, ISBN-10: 0-13-198926-X, ISBN-13: 978-0-13-198926-9
- Computer Organization and Design, The Hardware/Software Interface, 4th ed, by David A. Patterson and John L. Hennessy, ISBN: 978-0-12-374493-7
- Digital Design and Computer Architecture, 2nd ed, by D. Harris and S. Harris, ISBN: 978-0-12-394424-5
|Tue 9/8||Representing Numbers||M&K: 1, 4.3-4.4, 10.7H&H: 1.4P&H: 3.5 ||intro.pdf|
|Thu 9/10||Boolean Logic||M&K: 2.1-2.5, 2.8, 2.9H&H: 1.5, 2.1-2.7||boolean.pdf|
|Thu 9/17||Combinational Logic||M&K: 3.1, 3.3, 3, 3.6-3.9, 4.1-4.2, 4.5, 9.4H&H: 2.8,2.9,5.2||combinational.pdf|
|Thu 9/24||Sequential Logic||M&K: 5.1-5.3, 5.6H&H: 3.1-3.3,3.5||sequential.pdf||hw1.pdf|
|Thu 10/1||Finite State Machines||M&K: 5.4-5.5H&H: 3.4||fsms.pdf|
|Thu 10/8||Memory Elements||M&K: 6.8, 7.1-7.3, 8.1-8.7H&H: 5.5||memory.pdf|
|Tue 10/13||The MIPS Instruction Set||H&H: 6.1-6.7P&H: 2.1-2.8, 2.10||mips-isa.pdf|
|Thu 10/15||Review Session||hw3.pdf|
|Tue 10/20||Midterm #1|
|Tue 11/3||Election Day (No class!)|
|Thu 11/5||MIPS Microarchitecture||H&H: 7.1-7.3P&H: 4.1-4.4||mips-uarch.pdf|
|Thu 11/12||A Multicycle MIPS Processor||H&H: 7.4||mips-multicycle.pdf|
|Tue 11/17||Pipelined MIPS||H&H: 7.5P&H: 4.5-4.8||mips-pipeline.pdf|
|Thu 11/19||Class cancelled (MK Travel)|
|Thu 11/26||Thanksgiving (No class!)|
|Tue 12/1||Caches||H&H: 8.3P&H: 5.1-5.2||caches.pdf|
|Tue 12/8||Review Session||hw6.pdf|
|Thu 12/10||Midterm #2|