I am a first year Ph.D. student in Computer Science at Columbia University, where I am appointed as a Graduate Research Assistant and I am part of the System-Level Design Group. My research interests range from heterogeneous System-on-Chip and distributed embedded systems to emerging technologies and circuit architectures.


Columbia University (New York, USA)
Jan 16' - present

Graduate Research Assistant
System Level Design Group
Computer Science Department

Research work on memory hierarchy and cache coherence for System-on-Chip, more specifically the target is a multi-core instance of an Embedded Scalable Platform (ESP).

Politecnico di Torino (Torino, ITALY)
Jan 14' - Dec 14'

Graduate Researcher
Department of Electronics and Telecommunications

Thesis: MagnetoElastic NanoMagnet Logic Circuits.
This work has been the first circuit level study of a novel implementation of the Magnetic QCA: the MagnetoElastic NanoMagnet Logic (ME-NML). Firstly, I defined a Standard Cell Library and developed a RTL model for handling ME-NML circuits. The model also evaluates area occupation and power consumption. Secondly, I designed the first complex circuit: a fully parametric Galois Field Multiplier. Through this case study I carried out an accurate comparison of ME-NML with the Magnetic Clock NML and the state of the art CMOS transistor. At last, I developed a more complex second case study to identify the architectural organizations best suited for ME-NML and to assess the impact of the interleaving technique.


Fiat Chrysler Automobiles (Torino, ITALY)
May 15' - Dec 15'

Test Engineer
Electrical and Electronic Validation Department

EnviSens Technologies (Chivasso, ITALY)
Mar 12' - Jul 12'

Firmware Design Intern

Thesis: Firmware debug and software interface creation of a wireless sensors network.
The subject was a proprietary embedded system for the remote acquisition of environmental data (temperature, GPS, accelerometer) through a wireless sensor network. The main task concerned the firmware (C, Assembly) for the microcontroller present on each board of the network (TI MSP430x2xx family, running FreeRTOS).


Columbia University (New York, USA)
Jan 16' - present

Ph.D. in Computer Science

University of Illinois at Chicago (Chicago, USA)
Jan 13' - May 15'

M.Sc. in Electrical and Computer Engineering

Politecnico di Torino (Torino, ITALY)
Sep 12' - Dec 14'

M.Sc. in Electronic Engineering

Tongji University (Shanghai, CHINA)
Sep 10' - Jan 15'

B.Sc. in Electronic Information and Engineering

Politecnico di Torino (Torino, ITALY)
Sep 09' - Jul 12'

B.Sc. in Information Technology Engineering


Giri D., Vacca M., Causapruno G., Graziano M., Zamboni M.
"Modeling, Design, and Analysis of MagnetoElastic NML Circuits"
IEEE Transactions on Nanotechnology, Vol. 15, No. 6, October 2016.
Giri D., Vacca M., Causapruno G., Rao W., Graziano M., Zamboni M.
"A Standard Cell Approach fro MagnetoElastic NML Circuits"
The Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), 65-70, 8-10 July 2014.


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