Giuseppe Di Guglielmo

These are my:

• Academic CV
• Research Statement

Research interests

I hold a Ph.D. in Computer Science with focus on the verification, validation, and testing of hardware at the system level. My areas of research are computer-aided design and verification of heterogeneous Systems-on-Chip. Current research topics are the design, optimization, and validation of hardware accelerators with emphasis on high-level synthesis and FPGA. I am interested in various application domains, such as physics, biology, image processing, and machine learning. I am recently investigating architectural solutions for hardware and software security.

Education

• Ph.D. in Computer Science, April 2009
  • On the validation of embedded systems through functional ATPG (University of Verona - Research Catalogue)
  • Department of Computer Science – University of Verona
• Laurea degree in Computer Science Magna cum Laude, September 2005
• Verifica funzionale dei dispositivi digitali mediante manipolazione di Macchine a Stati Finiti Estese
• University of Verona – Faculty of Mathematical, Physical and Natural Science
• Classical Studies Diploma, July 1998
  • Liceo Ginnasio di Stato Scipione Maffei, Italy

Certifications

• Machine Learning by Stanford University on Coursera (Prof. Andrew Ng).
  • Certificate earned on February 24, 2017

Academic experiences and employment history

• Research Scientist in Computer Science at the Department of Computer Science, Columbia University in the City of New York, USA, October 2021 till now
• Associate Research Scientist in Computer Science at the Department of Computer Science, Columbia University in the City of New York, USA, October 2013 to September 2021
• Postdoctoral Research Scientist in Computer Science at the Department of Computer Science, Columbia University in the City of New York, USA, November 2012 - September 2013
• Visiting Researcher at the School of Electrical and Computer Engineering, Purdue University, IN, USA, August 2009 to February 2010
• Postdoctoral Fellow in Computer Science at the Department of Computer Science, University of Verona, Italy, April 2009 to October 2012
• Postdoctoral Fellow at the VLSI Design and Education Center (VDEC), University of Tokyo, Tokyo, Japan, March 2010 to March 2011
• Internship at Certess Inc. (now Synopsys), France, September 2007 to December 2007
• Visiting Scholar at the Department of Computer Engineering, Tallinn University of Technology, Estonia, October 2006 to February 2007