The first experiment (shown in Table 1) shows synthesis results using both MINIMALIST and 3D for a performance-oriented implementation.
For asynchronous burst-mode machines, the metric that best approximates performance is output latency. In an asynchronous system, unlike synchronous, the input-to-output latency typically determines a machine's performance, as well as overall system performance. State changes are not bound to a clock period, and in practice are usually non-critical (see [16]).
Based on the above observation, we now indicate the settings of the various modes of MINIMALIST for this experiment. In the context of technology-independent two-level logic, the cost function that most reasonably approximates output latency is the average number of literals per output. When comparing two results for the same machine (so that the number of outputs is fixed), this cost is equivalent to total output literal count, so this is used instead.
Roughly half of the MINIMALIST results in this set of runs make use of the fed-back output machine implementation style. Table 1 identifies the particular style chosen for each design in the column labelled 'FBO'. MINIMALIST is directed to use the single-output logic implementation style, and the literal count cost function. This combination of modes best minimizes average output literal count. This cost function also allows for a fair comparison to 3D, which produces single-output logic with minimal literal count. Finally, the encoding step uses fixed-length constraint satisfaction mode, attempted under several code lengths.
The MINIMALIST script in Figure 4 summarizes the selected modes. The script is parameterized by code length, using the variable $codeLen, and proceeds as follows. First, the specification is read from a file and checked for validity. Next, the machine is subjected to exact state minimization using fed-back outputs.6 The states are encoded using CHASM, with the fed-back output ('-F'), single-output ('-s'), literal-count ('-L'), and fixed-length ('-l') flags. The final two-level logic is then synthesized using HFMIN, again passing the single-output and literal-count flags. Finally, the resulting logic is verified using the algorithm sketched in Section 4. The script was run in batch mode several times. The run having the lowest output literal count over 1-3 code lengths near the minimum is reported.
The 3D results were obtained using the 3D tool on the Unix platform. Unlike MINIMALIST, 3D embodies a hard-wired synthesis path, and produces a single deterministic result. Specifically, 3D first performs heuristic state minimization, followed by heuristic state encoding, and finally, exact two-level single-output logic synthesis using HFMIN, targetting total literal count. Thus, a single run for each design gives the reported (and the only possible) result.
Table 1 summarizes the comparison. MINIMALIST
synthesis results demonstrate an average reduction of 
in output
literals, with the best being a 
reduction for sd-control.
In exchange for MINIMALIST's simplification in output logic, an increase
in total literal count is occasionally observed (see for example pe-send-ifc
and pscsi-tsend). However, MINIMALIST also frequently achieves
a reduction in total literal count as well, with larger designs such
as stetson-p1 and oscsi among the most impressive gains (
and 
,
respectively).
Clearly, MINIMALIST's gains come in part from its ability to explore wider encodings. In fact, in 12 of the 23 designs, the best result is seen at a longer code length than 3D uses. The greatest improvement overall, in sd-control, is seen at a significantly longer code length -- 7 bits for MINIMALIST vs. 3 bits for 3D. For two designs, MINIMALIST chooses a shorter encoding than 3D: dram-ctrl (whose 0-bit encoding is enabled by the use of fed-back outputs), and oscsi (where 3D curiously uses 7 bits, despite no gain in output literals and a considerable increase in overall logic complexity). For the remaining examples, MINIMALIST achieved its best result at the same code length as 3D.
