The benchmark suite consists of 23 burst-mode circuits, including several industrial designs, as well as a number of large asynchronous machines (e.g., see sc-control and oscsi). The circuits it-control, rf-control, sc-control, and sd-control are part of a low-power infrared controller designed at HP Labs as part of the Stetson project [16]. pe-send-ifc and sbuf-xxx-ctl, also from HP Labs, are part of a high-performance adaptive routing chip, used in the Mayfly parallel processing system [28]. Several others (e.g. the scsi-xxx and pscsi-xxx suites) come from a high-performance asynchronous SCSI controller designed by Yun while at AMD [37]. A DRAM controller circuit for Motorola 68K processors [34], dram-ctrl, completes the suite.
All MINIMALIST results are the best of a very small number of trials using fixed-length encodings. Generally, near-minimum code lengths are used. Here, minimum length refers to the smallest length sufficient for a critical-race free encoding, which is necessary to ensure correct operation. However, as demonstrated below, a trade-off exists, whereby significantly wider encodings sometimes offer better output logic at the expense of added next-state logic complexity. Hence, the results below occasionally make use of longer codes.
Run-times for the complete synthesis path are comparable for all tools (MINIMALIST, 3D, and UCLOCK), ranging from under 1 second to several minutes for the largest designs.