MINIMALIST incorporates a recent method [22] for
synthesis-for-testability targetting multi-level logic. The method produces
circuits that are both hazard-free and 
testable under either stuck-at
or robust path delay fault models, with little or no overhead. First, it uses
a novel two-level hazard-free logic minimization algorithm which minimizes the
number of redundant cubes, as well as the number of non-prime cubes. (The tool
currently operates only in single-output mode.) This helps maximize testability
without using additional inputs. If not yet completely testable, the circuit
is converted to a multi-level form which is completely testable (if possible).
If still not completely testable (rarely the case), controllable inputs are
added, yielding
testable logic. Finally, hazard- and testability-preserving
multi-level transformations are used to reduce the area of the resulting circuit.
The area overhead is typically zero, and in all cases is less than 
[22].