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Conference Publications

  1. Composable Lightweight Processors (pdf)
    C. Kim, S. Sethumadhavan, M.S. Govindan, N. Ranganathan, D. Gulati, D. Burger and S.W. Keckler
    40th Annual International Symposium on Microarchitecture (Micro 2007), Chicago, IL, USA
  2. Late-Binding: Enabling Unordered LSQs (pdf)
    S. Sethumadhavan, F. Roesner, D.Burger, S.W.Keckler, and J. Emer
    International Conference on Computer Architecture (ISCA 2007), San Diego, CA, USA
  3. Implementation of the Distributed TRIPS Microarchitecture (pdf) K. Sankaralingam, R. Nagarajan, R. McDonald, R. Desikan, S. Drolia, M.S. Govindan, P. Gratz, D. Gulati, H. Hanson, C. Kim, H. Liu, N. Ranganathan, S. Sethumadhavan, S. Sharif, P.K. Shivakumar, S. W. Keckler, D.C. Burger
    39th International Symposium on Microarchitecture (MICRO 39), Orlando, FL, USA
  4. Design and Implementation of the TRIPS Primary Memory System(pdf)
    S. Sethumadhavan, R.McDonald, R.Desikan, D.Burger, and S.W.Keckler
    24th International Conference on Computer Design (ICCD 2006), San Jose, CA, USA
  5. Scalable Selective Re-execution for EDGE Architectures (pdf)
    R.Desikan, S. Sethumadhavan, D.Burger, and S.W.Keckler
    Eleventh International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS XI), Boston, MA, USA
  6. Scalable Hardware Memory Disambiguation for High ILP Processors (pdf) S. Sethumadhavan, R.Desikan, D.Burger, C.R.Moore and S.W.Keckler
    36th International Symposium on Microarchitecture (MICRO 36), San Diego, CA, USA
  7. Distributed Pagerank for P2P Systems (pdf)
    K.Sankaralingam, S. Sethumadhavan and J.C.Browne
    12th IEEE International Symposium on High Performance Distributed Computing (HPDC-12), Seattle, WA, USA

Journal Publications

  1. Scalable Hardware Memory Disambiguation for High ILP Processors (Abstract)
    S. Sethumadhavan, R.Desikan, D.Burger, C.R.Moore and S.W.Keckler
    IEEE Top Picks in Computer Architecture Conferences, IEEE Micro Magazine, Nov-Dec, 2004
  2. Pagerank Computation and Keyword Search on Distributed Systems and P2P Networks
    K. Sankaralingam, M. Yalamanchi, S. Sethumadhavan, and J. C. Browne
    Journal of Grid Computing, 2003, Volume 1, Issue 3, pp. 291-307 (Invited Paper)
  3. Scaling to the End of Silicon with EDGE Architectures
    D.urger, S.W. Keckler, K.S. McKinley, M. Dahlin, L.K. John, C. Lin, C.R. Moore, J. Burrill, R.G.McDonald, W. Yoder, and the TRIPS Team
    IEEE Computer Magazine, July 2004.

Workshop Publications

  1. Multitasking Workload Scheduling on Flexible Core Chip Multiprocessors (pdf)
    Divya P. Gulati Changkyu Kim Simha Sethumadhavan Stephen W. Keckler Doug Burger
    Workshop on Design, Architecture and Simulation of Chip Multi-Processors
    Held in conjunction with the 40th Annual International Symposium on Microarchitecture
  2. Lightweight Distributed Selective Re-Execution and its Implications for Value Speculation (pdf)
    R.Desikan, S.Sethumadhavan, R.Nagarajan, D.Burger and S.W.Keckler
    First Value Prediction Workshop, ISCA 30, San Diego, CA, USA
  3. Compiler Directed Parallelization of Loops in Scale for Shared-Memory Multiprocessors
    G.S. Johnson and S. Sethumadhavan
    2003 International Conference on Computational Science

Talks

  © Simha Sethumadhavan.