Christian Pilato
Columbia University - Department of Computer Science
Post-doc Research Scientist
The main interest of Christian Pilato's research is the development of methodologies and tools for the design and optimization of embedded systems equipped with dedicated hardware accelerators. In particular, the activity carried out in the last years spans over the following research lines: high-level synthesis and hardware/software co-design, and physical-level optimizations exploiting standard-cell library extensions.
Research projects
  • PandA: a framework for hardware/software co-design. It also includes bambu, a free software framework for the high-level synthesis of complex applications (freely available for download here).
European-funded projects
  • FASTER (Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration), EU FP7 Specific Targeted Research Projects (STREP), Contract no. 287804, local project leader: Donatella Sciuto
    Leader of Task 2.2: “Application task profiling and identification of reconfigurable cores”
  • Synaptic (SYNthesis using Advanced Process Technology Integrated in regular Cells, IPs, architectures, and design platforms), EU FP7 Specific Targeted Research Projects (STREP), Contract no. 248538, local project leader: Fabrizio Ferrandi
  • hArtes (Holistic Approach to Reconfigurable real Time Embedded Systems), EU FP6 Integrated Project (IP), Contract no. 035143, local project leader: Donatella Sciuto

High-Level Synthesis and Hardware/Software Co-Design of Embedded Systems

Heterogeneous multiprocessor architectures are the de-facto standard for embedded system design. When developing an application on such embedded systems, the designer has to determine when and where the tasks and the communications should be executed, depending on a set of constraints and dependences. Moreover, custom hardware accelerators are known to outperform the corresponding software solutions by different orders of magnitude, but the resources for their implementation are usually limited in the final architecture and design space exploration is definitely required. Finally, when implementing a single task, the designer cannot know in advance which is the best hardware solution and, for this reason, the different trade-offs solutions should be properly selected and combined at system-level, based on the requirements of the application and the constraints of the target architecture.

Given these motivations, the main goal of this research is to develop a methodology that generates multiple hardware implementations by combining an innovative architectures for high-level synthesis (CODES 2011) and a multi-objective design space exploration (SAMOS 2007, further extended in JSA 2008). In addition, the outcome of this research has involved the creation of bambu, a free software framework for the high-level synthesis of complex applications, released in March of 2012. This framework can be used to evaluate new algorithms and architectures for high-level synthesis, including the effects of the integration with the rest of the embedded system.

After that, Christian Pilato proposed an innovative methodology, based on Ant Colony Optimization, for mapping and scheduling a partitioned application in order to improve its overall performance while respecting all the constraints imposed by the target architecture (e.g., the limited area for hardware accelerators). The results have been published in ASPDAC 2010 and TCAD 2010. This methodology is able to easily take into account the different hardware implementations generated in the previous phase and it results in an integrated methodology for determining the proper implementation for each part of the input C application, spawing from behavioral synthesis to system-level design.

Logic and Physical Optimizations with Cell-Library Extensions

Current EDA (Electronic Design Automation) tools often rely on a semi-custom design flow, based on standard-cell libraries, which cells are typically optimized with full-custom layouts. However, the quality of the cell library can considerably impact the final area and delay of a design, and there is not a clear consensus about the best approach to compose a standard-cell library.

Christian Pilato's contributions in this field include a complete methodology for the generation of custom standard-cell libraries that can be easily integrated in the current industrial EDA flows. Thanks to this method, it is possible to determine the proper composition of a standard-cell library based on the analysis of the input design and interfacing with commercial tools for the generation of the cells and the synthesis of the circuits.

The main results of the proposed research have been published in ISVLSI 2010 and GLSVLSI 2011. Christian Pilato's research on this topic is also at the basis of the design methodology of Synaptic, an FP7-STREP EU project for improving the manufactoring of digital circuits.