Emilio G. Cota: PhD Candidacy Exam

Syllabus

    Motivation

  1. [Hameed 2010] Understanding sources of inefficiency in general-purpose chips
    by Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis and Mark Horowitz.
    In the Proceedings of the 37th annual international symposium on Computer architecture, 2010, 37–47.

  2. [Borkar 2011] The future of microprocessors
    by Shekhar Borkar and Andrew A. Chien.
    Commun. ACM, vol. 54, no. 5, 67–77, May 2011.

  3. [Consortium 2012] 21st Century Computer Architecture
    by Computing Community Consortium, led by Mark D. Hill.
    A Community White Paper, May 2012.

  4. Memory Controller

  5. [Mutlu 2007] Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors
    by Onur Mutlu and Thomas Moscibroda.
    In the Proceedings of the 40th Annual IEEE/ACM International Symposium on Microarchitecture, 2007, 146–160.

  6. [Abts 2009] Achieving predictable performance through better memory controller placement in many-core CMPs
    by Dennis Abts, Natalie D. Enright Jerger, John Kim, Dan Gibson and Mikko H. Lipasti.
    In the Proceedings of the 36th annual international symposium on Computer architecture, 2009, 451–461.

  7. Non-Uniform Cache Architectures (NUCA)

  8. [Kim 2002] An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches
    by Changkyu Kim, Doug Burger and Stephen W. Keckler.
    In the Proceedings of the 10th international conference on Architectural support for programming languages and operating systems, 2002, 211–222.

  9. [Cho 2006] Managing distributed, shared L2 caches through OS-level page allocation
    by Sangyeun Cho and Lei Jin.
    In the Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture, 2006, 455–468.

  10. [Merino 2010] ESP-NUCA: A low-cost adaptive non-uniform cache architecture
    by Javier Merino, Valentin Puente and Jose A. Gregorio.
    In the 2010 IEEE 16th International Symposium on High Performance Computer Architecture (HPCA), 2010, 1–10.

  11. [Herrero 2010] Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
    by Enric Herrero, José González and Ramon Canal.
    In the Proceedings of the 37th annual international symposium on Computer architecture, 2010, 419–428.

  12. [Lee 2011] CloudCache: Expanding and shrinking private caches
    by Hyunjin Lee, Sangyeun Cho and Bruce R. Childers.
    In the 2011 IEEE 17th International Symposium on High Performance Computer Architecture (HPCA), 2011, 219–230.

  13. Multicore Scalability

  14. [Baumann 2009] The multikernel: a new OS architecture for scalable multicore systems
    by Andrew Baumann, Paul Barham, Pierre-Evariste Dagand, Tim Harris, Rebecca Isaacs, Simon Peter, Timothy Roscoe, Adrian Schüpbach and Akhilesh Singhania.
    In the Proceedings of the ACM SIGOPS 22nd symposium on Operating systems principles, 2009, 29–44.

  15. [Boyd-Wickizer 2010] An analysis of Linux scalability to many cores
    by Silas Boyd-Wickizer, Austin T. Clements, Yandong Mao, Aleksey Pesterev, M. Frans Kaashoek, Robert Morris and Nickolai Zeldovich.
    In the Proceedings of the 9th USENIX conference on Operating systems design and implementation, 2010, 1–8.

  16. [Clements 2012] Scalable address spaces using RCU balanced trees
    by Austin T. Clements, M. Frans Kaashoek and Nickolai Zeldovich.
    In the Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems, 2012, 199–210.

  17. [Lotfi-Kamran 2012] Scale-out processors
    by Pejman Lotfi-Kamran, Boris Grot, Michael Ferdman, Stavros Volos, Onur Kocberber, Javier Picorel, Almutaz Adileh, Djordje Jevdjic, Sachin Idgunji and Emre Ozer.
    In the Proceedings of the 39th International Symposium on Computer Architecture, 2012, 500–511.

  18. [Boyd-Wickizer 2012] Non-scalable locks are dangerous
    by Silas Boyd-Wickizer, M. Frans Kaashoek, Robert Morris and Nickolai Zeldovich.
    In the Proceedings of the Linux Symposium, Ottawa, Canada, 2012.

  19. [Martin 2012] Why on-chip cache coherence is here to stay
    by Milo MK Martin, Mark D. Hill and Daniel J. Sorin.
    Communications of the ACM, vol. 55, no. 7, 78–89, Jul. 2012.

  20. [Dashti 2013] Traffic management: A holistic approach to memory placement on NUMA systems
    by Mohammad Dashti, Alexandra Fedorova, Justin Funston, Fabien Gaud, Renaud Lachaize, Baptiste Lepers, Vivien Quéma and Mark Roth.
    In the Proceedings of the eighteenth international conference on Architectural support for programming languages and operating systems, 2013, 381–394.

  21. Heterogeneous Architectures

  22. [Kim 2007] Composable Lightweight Processors
    by Changkyu Kim, S. Sethumadhavan, M. S. Govindan, N. Ranganathan, D. Gulati, D. Burger and S.W. Keckler.
    In the 40th Annual IEEE/ACM International Symposium on Microarchitecture, 2007. MICRO 2007, 2007, 381–394.

  23. [Chung 2010] Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?
    by E.S. Chung, P.A. Milder, J.C. Hoe and Ken Mai.
    In the Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010, 225–236.

  24. [Goulding-Hotta 2011] The GreenDroid mobile application processor: An architecture for silicon’s dark future
    by Nathan Goulding-Hotta, Jack Sampson, Ganesh Venkatesh, Saturnino Garcia, Joe Auricchio, P. Huang, Manish Arora, Siddhartha Nath, Vikram Bhatt and Jonathan Babb.
    Micro, IEEE, vol. 31, no. 2, 86–95, 2011.

  25. [Esmaeilzadeh 2012] Architecture support for disciplined approximate programming
    by Hadi Esmaeilzadeh, Adrian Sampson, Luis Ceze and Doug Burger.
    In the Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems, 2012, 301–312.

  26. [Cong 2012] Architecture support for accelerator-rich CMPs
    by Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian and Glenn Reinman.
    In the Proceedings of the 49th Annual Design Automation Conference, 2012, 843–849.

  27. [Raghavan 2013] Computational Sprinting on a Hardware/Software Testbed
    by Arun Raghavan, Laurel Emurian, Lei Shao, Marios Papaefthymiou, Kevin P. Pipe, Thomas F. Wenisch and Milo MK Martin.
    In the Proceedings of the eighteenth international conference on Architectural support for programming languages and operating systems, 2013, 155–166.