# Loading project test3
# reading /opt/altera/quartus-13.1/modelsim_ase/linux/../modelsim.ini
# Loading project test1
# Compile of testbench1.sv failed with 1 errors.
# Compile of RAM.v was successful.
# Compile of RAM_searcher.sv was successful.
# Compile of TOE.sv was successful.
# Compile of TOE_init.sv was successful.
# 5 compiles, 1 failed with 1 error. 
# Compile of testbench1.sv failed with 1 errors.
# Compile of RAM.v was successful.
# Compile of RAM_searcher.sv was successful.
# Compile of TOE.sv was successful.
# Compile of TOE_init.sv was successful.
# 5 compiles, 1 failed with 1 error. 
# Compile of testbench1.sv failed with 1 errors.
# Compile of RAM.v was successful.
# Compile of RAM_searcher.sv was successful.
# Compile of TOE.sv was successful.
# Compile of TOE_init.sv was successful.
# 5 compiles, 1 failed with 1 error. 
# Compile of testbench1.sv was successful.
# Compile of RAM.v was successful.
# Compile of RAM_searcher.sv was successful.
# Compile of TOE.sv was successful.
# Compile of TOE_init.sv was successful.
# 5 compiles, 0 failed with no errors. 
vsim work.testbench1
# vsim work.testbench1 
# Loading sv_std.std
# Loading work.testbench1
# Loading work.TOE
# ** Error: (vsim-3033) /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/TOE.sv(135): Instantiation of 'Packetizer' failed. The design unit was not found.
#         Region: /testbench1/t0
#         Searched libraries:
#             /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/test1/work
# Loading work.TOE_init
# Loading work.RAM_searcher
# ** Error: (vsim-3033) /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/TOE.sv(151): Instantiation of 'Packet_builder' failed. The design unit was not found.
#         Region: /testbench1/t0
#         Searched libraries:
#             /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/test1/work
# ** Error: (vsim-3033) /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/TOE.sv(161): Instantiation of 'RAM2' failed. The design unit was not found.
#         Region: /testbench1/t0
#         Searched libraries:
#             /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/test1/work
# Error loading design
vsim -L altera_mf_ver work.testbench1
# vsim -L altera_mf_ver work.testbench1 
# Loading sv_std.std
# Loading work.testbench1
# Loading work.TOE
# ** Error: (vsim-3033) /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/TOE.sv(135): Instantiation of 'Packetizer' failed. The design unit was not found.
#         Region: /testbench1/t0
#         Searched libraries:
#             /opt/altera/quartus-13.1/modelsim_ase/altera/verilog/altera_mf
#             /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/test1/work
# Loading work.TOE_init
# Loading work.RAM_searcher
# ** Error: (vsim-3033) /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/TOE.sv(151): Instantiation of 'Packet_builder' failed. The design unit was not found.
#         Region: /testbench1/t0
#         Searched libraries:
#             /opt/altera/quartus-13.1/modelsim_ase/altera/verilog/altera_mf
#             /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/test1/work
# ** Error: (vsim-3033) /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/TOE.sv(161): Instantiation of 'RAM2' failed. The design unit was not found.
#         Region: /testbench1/t0
#         Searched libraries:
#             /opt/altera/quartus-13.1/modelsim_ase/altera/verilog/altera_mf
#             /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/test1/work
# Error loading design
# Compile of testbench1.sv was successful.
# Compile of RAM.v was successful.
# Compile of RAM_searcher.sv was successful.
# Compile of TOE.sv was successful.
# Compile of TOE_init.sv was successful.
# Compile of Packet_builder.sv was successful with warnings.
# Compile of Packetizer.sv was successful.
# 7 compiles, 0 failed with no errors. 
vsim -L altera_mf_ver work.testbench1
# vsim -L altera_mf_ver work.testbench1 
# Loading sv_std.std
# Loading work.testbench1
# Loading work.TOE
# Loading work.Packetizer
# Loading work.TOE_init
# Loading work.RAM_searcher
# Loading work.Packet_builder
# ** Error: (vsim-3033) /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/TOE.sv(161): Instantiation of 'RAM2' failed. The design unit was not found.
#         Region: /testbench1/t0
#         Searched libraries:
#             /opt/altera/quartus-13.1/modelsim_ase/altera/verilog/altera_mf
#             /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/test1/work
# Error loading design
vsim -L altera_mf_ver work.testbench1
# vsim -L altera_mf_ver work.testbench1 
# Loading sv_std.std
# Loading work.testbench1
# Loading work.TOE
# Loading work.Packetizer
# Loading work.TOE_init
# Loading work.RAM_searcher
# Loading work.Packet_builder
# ** Error: (vsim-3033) /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/TOE.sv(161): Instantiation of 'RAM2' failed. The design unit was not found.
#         Region: /testbench1/t0
#         Searched libraries:
#             /opt/altera/quartus-13.1/modelsim_ase/altera/verilog/altera_mf
#             /home/user2/spring14/cb3022/TOEA/lab3-qsys/sv/test1/work
# Error loading design
# Compile of testbench1.sv was successful.
# Compile of RAM_searcher.sv was successful.
# Compile of TOE.sv was successful.
# Compile of TOE_init.sv was successful.
# Compile of Packet_builder.sv was successful with warnings.
# Compile of Packetizer.sv was successful.
# Compile of RAM2.v was successful.
# 7 compiles, 0 failed with no errors. 
vsim -L altera_mf_ver work.testbench1
# vsim -L altera_mf_ver work.testbench1 
# Loading sv_std.std
# Loading work.testbench1
# Loading work.TOE
# Loading work.Packetizer
# Loading work.TOE_init
# Loading work.RAM_searcher
# Loading work.Packet_builder
# Loading work.RAM2
# Loading altera_mf_ver.altsyncram
# Loading altera_mf_ver.ALTERA_DEVICE_FAMILIES
# Loading altera_mf_ver.ALTERA_MF_MEMORY_INITIALIZATION
add wave sim:/testbench1/t0/*
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