Altera SOPC Builder Version 7.20 Build 151
Copyright (c) 1999-2007 Altera Corporation.  All rights reserved.


# 2009.05.12 23:46:42 (*) mk_custom_sdk starting
# 2009.05.12 23:46:42 (*) Reading project /home/user4/spring09/fkz1/courses/w4840/project/VGA/cs_sys.ptf.

# 2009.05.12 23:46:42 (*) Finding all CPUs
# 2009.05.12 23:46:42 (*) Finding all available components
# 2009.05.12 23:46:42 (*) Reading /home/user4/spring09/fkz1/courses/w4840/project/VGA/.sopc_builder/install.ptf

# 2009.05.12 23:46:42 (*) Found 67 components

# 2009.05.12 23:46:44 (*) Finding all peripherals

# 2009.05.12 23:46:44 (*) Finding software components

# 2009.05.12 23:46:45 (*) (Legacy SDK Generation Skipped)
# 2009.05.12 23:46:45 (*) (All TCL Script Generation Skipped)
# 2009.05.12 23:46:45 (*) (No Libraries Built)
# 2009.05.12 23:46:45 (*) (Contents Generation Skipped)
# 2009.05.12 23:46:45 (*) mk_custom_sdk finishing

# 2009.05.12 23:46:45 (*) Starting generation for system: cs_sys.

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# 2009.05.12 23:46:47 (*) Running Generator Program for cpu

# 2009.05.12 23:46:49 (*)   Checking for plaintext license.
# 2009.05.12 23:46:49 (*)   Couldn't query license setup in Quartus directory /opt/e4840/altera7.2/quartus
# 2009.05.12 23:46:49 (*)   Defaulting to contents of LM_LICENSE_FILE environment variable
# 2009.05.12 23:46:49 (*)   Plaintext license not found.
# 2009.05.12 23:46:49 (*)   Checking for encrypted license (non-evaluation).
# 2009.05.12 23:46:49 (*)   Couldn't query license setup in Quartus directory /opt/e4840/altera7.2/quartus
# 2009.05.12 23:46:49 (*)   Defaulting to contents of LM_LICENSE_FILE environment variable
# 2009.05.12 23:46:49 (*)   Encrypted license found.  SOF will not be time-limited.
# 2009.05.12 23:47:15 (*)   Creating encrypted HDL

# 2009.05.12 23:47:20 (*) Running Generator Program for sdram

# 2009.05.12 23:47:23 (*) Running Generator Program for jtag_uart

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# 2009.05.12 23:47:24 (*) Running Test Generator Program for sdram

# 2009.05.12 23:47:25 (*) Making arbitration and system (top) modules.

# 2009.05.12 23:47:34 (*) Generating Quartus symbol for top level: cs_sys

# 2009.05.12 23:47:34 (*) Symbol /home/user4/spring09/fkz1/courses/w4840/project/VGA/cs_sys.bsf already exists, no need to regenerate
# 2009.05.12 23:47:34 (*) Creating command-line system-generation script: /home/user4/spring09/fkz1/courses/w4840/project/VGA/cs_sys_generation_script

# 2009.05.12 23:47:34 (*) Running setup for HDL simulator: modelsim


# 2009.05.12 23:47:34 (*) Setting up Quartus with cs_sys_setup_quartus.tcl
/opt/e4840/altera7.2/quartus/bin/quartus_sh -t cs_sys_setup_quartus.tcl


Info: *******************************************************************
Info: Running Quartus II Shell
    Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
    Info: Copyright (C) 1991-2007 Altera Corporation. All rights reserved.
    Info: Your use of Altera Corporation's design tools, logic functions 
    Info: and other software and tools, and its AMPP partner logic 
    Info: functions, and any output files from any of the foregoing 
    Info: (including device programming or simulation files), and any 
    Info: associated documentation or information are expressly subject 
    Info: to the terms and conditions of the Altera Program License 
    Info: Subscription Agreement, Altera MegaCore Function License 
    Info: Agreement, or other applicable license agreement, including, 
    Info: without limitation, that your use is for the sole purpose of 
    Info: programming logic devices manufactured by Altera and sold by 
    Info: Altera or its authorized distributors.  Please refer to the 
    Info: applicable agreement for further details.
    Info: Processing started: Tue May 12 23:47:34 2009
Info: Command: quartus_sh -t cs_sys_setup_quartus.tcl
Info: Evaluation of Tcl script cs_sys_setup_quartus.tcl was successful
Info: Quartus II Shell was successful. 0 errors, 0 warnings
    Info: Processing ended: Tue May 12 23:47:35 2009
    Info: Elapsed time: 00:00:01

# 2009.05.12 23:47:35 (*) Completed generation for system: cs_sys.
# 2009.05.12 23:47:35 (*) THE FOLLOWING SYSTEM ITEMS HAVE BEEN GENERATED:
  SOPC Builder database : /home/user4/spring09/fkz1/courses/w4840/project/VGA/cs_sys.ptf 
  System HDL Model : /home/user4/spring09/fkz1/courses/w4840/project/VGA/cs_sys.vhd 
  System Generation Script : /home/user4/spring09/fkz1/courses/w4840/project/VGA/cs_sys_generation_script 

# 2009.05.12 23:47:35 (*) SUCCESS: SYSTEM GENERATION COMPLETED.


Press 'Exit' to exit.
