CS E6831

Solutions for HWK #7 PROBLEMS: ASYNC 4/(3, 4, 5, 7, 10). TEXT: 6/(22, 23)

4.3. F= SIGMA(0, 4, 5, 7, 11, 13, 17)
          A
     1 1 0 0           Use all the 1-D cubes, which cover the adjacent
                       1-pts.  This gives us the SOP solution:
     0 1 0 1           F = AB'D + ACD + A'BC' + A'BD + A'C'D' + BCD
   D
     0 1 1 1
             C
     0 0 0 0
        B

Now, to get the POS (product of sums) solution, we map F', find the
SOP solution for F' as we did above, and then complement that
solution.

      0 0 1 1   Again, covering all adjacent pairs of 1-points, we get
                F' = ABC' + AD' + CD' + A'B'D + A'B'C
      1 0 1 0
                Complementing, yields,
      1 0 0 0   
                F = (A' + B' + C)(A' + D)(C' + D)(A + B + D')(A + B + C')
      1 1 1 1 

4.4.

(a) The 4-5 transition entails a change in D starting in state 
0100.  The cube that covers that transition is A'BC'.  Removing that
cube leaves both of the 1-points involved still covered, but leaves 
the boundary between those points uncovered, so that transitions 
between those points will involve a static 1-hazard.  Similarly, the
transition 11-13 (between points 1001 and 1011) is covered by AB'D.
Removing AB'D introduces a 1-hazard for transitions 1001-1011.  The
resulting ckt consists of a first stage of AND-gates corresponding to
the product terms in ACD + A'BD + A'C'D' + BCD, and the second stage
is an AND-gate fed by the outputs of these gates.

To defeat the 4-5 hazard for changes from 4 to five (i.e., when D is
turned on starting with the ckt in 0100), we need to ensure that the
A'BD AND-gate goes on before the A'C'D' AND-gate goes off.  This can
be accomplished by inserting a delay in the D'-input to the  A'C'D'
AND-gate.  But now, while the hazard for the 4->5 transition is
defeated, the hazard for the 5->4 transition will definitely be
manifested.  This is because we have now ensured that, when D is turned
OFF, the A'C'D' gate will be slow to go on, so that there will be an
interval during which BOTH the A'C'D' gate and the  A'BD-gate will be
off.

(b) 2-3 transitions are between 0010 and 0011, where D is changing.
If we eliminate the OR-gate that is OFF for both of these points,
namely that realizing (A + B + D'), we introduce a static 0-hazard for
this transition (in either direction).

4.5. F = (A' + C)(B + D') + (AD' + B)(B' + C').  Multiply out (a static
hazard-preserving operation) to obtain:
F = A'B + A'D' + BC + CD' + AB'D' + AC'D' + BB' + BC'
 The function map looks like:
        A
   1 1 1 1 

   0 1 1 0
  D
   0 1 1 0
           C
   1 1 1 1 
      B

For each p-term in the above expression, oval the appropriate cube on
the map.  Uncovered boundaries between adjacent 1-points are 0000-1000
(no p-term covers B'C'D'), 1100-1110, 1101-1111.  So these transitions
all have static 1-hazards.

Since the only term in the SOP expression including a product of the
form XX' is the p-term BB', SIC (single-input-change) static 0-hazards
could only occur for transitions involving a change in B.  But,
looking at the mapped function, we see that there are NO 0-points
differing only in the values of B.  Therefore, we can conclude that
there are NO static 0-hazards corresponding to the SOP expression, and
therefore none corresponding to the original expression.

Returning to the original expression,
F = (A' + C)(B + D') + (AD' + B)(B' + C'), we can see that the only
variable that can be involved in a SIC DYNAMIC hazard is B, since no
other literal appears at least three times with at least one
appearance of each polarity.  Can we specialize the other variables so
as to reduce the expression to a B + BB' or the dual form, (B + B')B?

The second form is clearly not obtainable.  To get to the first form
we need D' = 0 and (A' + C) = 1 (to preserve the first B), AD' = 0 (to
preserve the 2nd B, and C' = 0 (to preserve the B').  C = D = 1 is
sufficient to satisfy all these constraints and reduce F to B + BB'.
Note that A is unconstrained.  Therefore, we have dynamic hazard
conditions for the transitions 0011-0111 and for 1011-1111.

Examining the K-map, it is easy to see that there are only 2 pi's (prime
implicants), so we can express the function most economically, and
with NO logic hazards, as F = B + D'.

Since neither B nor D' are among the above p-terms, there are plenty of
logic 1-hazard for MIC operation.  These would be transitions within
the B-cube NOT included in any of the cubes of the expanded expression
for F.  Similarly for transitions within the D'-cube.  Examples are
0101-1111, 1101-0101, 0100-1110, 1100-0110, 0000-1010

4.10. The ckt is described by AB + B.  Suppose B and A change in
opposite directions.  Then we can let A = B' and obtain the expression
B'B + B, which obviously has a dynamic hazard for changes in B.  With
respect to the original expression, such a hazard occurs between 01
and 10.

Alternatively, we can map the expression, (f = AB + B) on a K-map, as below.
     A
   0 0

   1 1 B

The transition from 10 to 01 might pass thru 11, turning on the
AB-gate.  When the state changes to 01, the AB-gate output might then
go off, turning off the output, BEFORE the B-signal gets thru the
OR-gate to turn on the output again.

Text 6.22. Z = (A + B)'CD' + (A + B)C'D + ABC

Expanding the expression by using deMorgan's law and multiplying out
(a hazard-preserving transformations) we obtain:
Z = A'B'CD' + AC'D + BC'D + ABC

Plotting the function on a K-map we obtain:
(Oval the cubes corresponding to the p-terms in the expanded
expression.)

        A
   0 0 0 0

   0 1 1 1
  D
   0 0 1 0
          C
   1 0 1 0
      B

Note that the border between 1101 and 1111 is NOT covered by any of
the p-terms.  i.e., the cube ABD is missing.  Therefore, there is a
static 1-hazard for the transitions 1101-1111.  There are no other
such situations, and therefore no other SIC (single-input-change)
1-hazards.  There are no XX' terms in the expanded expressions, so
there can't be any SIC 0-hazards or dynamic hazards.

From the K-map we can generate an expressions consisting of a sum of
all pi's, namely, Z = BC'D + AC'D + ABD + ABC + A'B'CD'.
Clearly this is free of all logic hazards.  Factoring gives us:
(A + B)C'D + AB(C + D) + A'B'CD'.  Using deMorgan's theorem we then
get: Z = BC'D + AC'D + ABD + ABC + (A + B)'CD'.  The value of the last
step is that it allows us to generate (A + B) once and then use it
twice.  In the circuit, this means fanout from the output of the gate
generating (A + B).

Text 6.23.

(a) Z = A'B'D' + A'B'C + A'C'D' + A'BC' + A'BD + ABC + AB'D

(b) Z = AC'D' + B'CD' + A'B + BC' + BD + AC'D' + ACD + AB'D' + AB'C

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