Board CPU vs FPGA Gesture Comparison

Upload One Gesture Image, Run Two Inference Paths

The same browser-uploaded image is preprocessed once, then compared across board-side HPS CPU inference and the DE1-SoC FPGA accelerator path.

Input

Upload an image from your computer or capture one from your browser webcam. Wrong predictions can be saved as correction samples for later retraining.

Branch diagnostics will appear after one run.

Browser Webcam

Camera is off

This uses your PC/browser camera only. The captured frame is sent through the same pipeline as upload mode.

Upload Preview

Image selected from file upload
Uploaded preview
No image selected yet
Model Input (64x64) Preprocessed preview
Will appear after inference

Results

This panel compares the board-side HPS CPU software baseline against the existing board-side HPS + MMIO + FPGA path for the active 10-class gesture model line.

Predicted Gesture ID -
Board CPU Gesture ID -
Board CPU Time -
FPGA Wait Time -
FPGA RTL Time -
Speedup -
Board CPU and FPGA wait time are now same-platform metrics. Remote request time is reported separately.

CPU Confidence And Channel Scores

Waiting for one run.
Top Class -
Normalized Confidence -
Margin -
Top channels will appear after one run.

FPGA RTL Profile

Waiting for one run.
L1 -
L2 P0 -
L2 P1 -
L3 P0 -
L3 P1 -
FC -
Argmax -
Total -

Execution Time Comparison

Board CPU
-
FPGA
-
Waiting for an upload.

Built-In Sanity Suite

Runs the current web path on the repo's built-in `digit_0_test` to `digit_9_test` sample images so we can verify whether the deployed model line is internally consistent.

Not run yet.