[Printable CFP]

11th International Workshop on Logic & Synthesis

Call for Papers

 NEW: SUBMISSION EXTENSION!:
 The paper submission deadline has been extended by 1 WEEK:
       1) submit title+ author names:  by Wed. March 20, 7pm EST
2) submit paper:  by Fri. March 22, 7pm EST

[These are hard deadlines; no later submissions will be accepted]

The IEEE International Workshop on Logic Synthesis provides an international forum to promote research and exchange ideas about all aspects of IC synthesis, optimization, and verification. The workshop encourages early dissemination of ideas and results. Accepted papers are distributed only to IWLS participants. The workshop is co-sponsored by the IEEE Computer Society and ACM/SIGDA.

The workshop format includes short talks, posters, a panel discussion, and a social evening gathering. To further stimulate interaction among participants, there will be exercises in "collaborative problem solving". Attendees will be divided into groups, each tackling a challenging problem submitted through the web and selected by the focus group chair. The EDA community is encouraged to submit possible logic and synthesis problems through http://www.iwls.org/problems/. Examples of problems will be available at the web site in early January.

Topics of interest range across a variety of system description levels, from hardware/software, through behavioral, architectural, RTL, logic-level and transistor-level.  Topics include, but are not limited to:

  • Architectures & compilation
  • Synthesis & optimization
  • Power & timing analysis
  • Design validation & verification
  • Design experiences
  • These topics span both synchronous and asynchronous domains in all technologies, including: CMOS, GaAS, ECL, and Adiabatic.

    PAPER AND PROBLEM SUBMISSION:
    Submission deadline
    March 22, 2002 (7pm 
     EST); submit title +
     authors by March 20
      (7pm EST)
    Notice of acceptance
    April 15, 2002
    Final version due
    May 8, 2002

    Authors should submit extended abstracts for their proposed presentation. These must be no less than 1000 words and no greater than 2500 words (5 pages double column, 10pt font). These abstracts are not intended to be complete papers, but rather should contain the idea of the proposed presentation. We encourage submissions in the early stages of research which may highlight important new problems without necessarily providing complete solutions. Only electronic submissions will be accepted. See http://www.iwls.org for submission details. For questions, contact program_chair@iwls.org.

    TRAVEL GRANTS:
    Travel grants may be obtained by applying to ACM/SIGDA's travel grant program at http://www.sigda.acm.org/Programs/TravelGrant/

    WORKSHOP ORGANIZATION:

    General Chair:              Soha Hassoun (Tufts University)
    Program Chair:             Steven Nowick (Columbia University)
    Panel Chair:                   D. Marculescu (CMU)
    Focus Group Chair:     Y. Kukimoto (Silicon Perspective)
    Benchmark Chair:       A. Kuehlmann (Cadence)
    Audio-Visual Chair:   A. Mishchenko (Portland State University)

    Technical Program Committee:

                            I. Bahar (Brown University)
                            M. Berkelaar (Magma Design Automation)
                            R. Brayton (U.C. Berkeley)
                            J. Cortadella (UPC, Spain)
                            E. Dubrova (KTH, Sweden)
                            M. Fujita (University of Tokyo)
                            E. Jacobs (Magma Design Automation)
                            T. Kam (Intel)
                            V. Kravets (IBM T.J. Watson)
                            A. Kuehlmann (Cadence)
                            Y. Kukimoto (Silicon Perspective)
                            W. Kunz (University of Kaiserslautern)
                            D. Marculescu (CMU)
                            I. Markov (University of Michigan)
                            Y. Matsunaga (Kyushu University)
                            C. Meinel (University of Trier)
                            S.-I. Minato (NTT Network Innovation Labs)
                            R. Murgai (Fujitsu Labs of America)
                            M. Prasad (Fujitsu Labs of America)
                            A. Raghunathan (NEC Research Laboratory)
                            K. Sakallah (University of Michigan)
                            T. Sasao (Kyushu Inst. of Technology)
                            H. Savoj (Magma Design Automation)
                            E. Sentovich (Cadence Berkeley Labs)
                            N. Shenoy (Synopsys)
                            L. Stok (IBM)
                            M. Theobald (CMU)
                            T. Villa (PARADES, Italy)