CSEE 3827: Fundamentals of Computer Systems

Announcements

• 2/14: Regrade policy on homeworks and exams announced.
• 1/11: First class meeting on Wednesday 1/20 in Fayerweather 310.

Administrivia

• Description: The purpose of this course is to examine how the digital 1s and 0s that are the foundation of digital computing are organized, structured, and manipulated to become a full-fledged computer system. In bridging this gap, the course will cover many subjects beginning with binary logic, combinatorial and sequential circuit design, memory structures, instruction set architectures, and, ultimately, basic processor design.


• Prereqs: An introductory programming course (e.g., COMS 1004 or 1007).


• Lectures: Mondays and Wednesdays 1:10pm - 2:25pm in Fayerweather 310.


• Course staff and contact information: There are several ways to ask questions and get help:
  • Email the course staff
  • Post a question to the course messageboard on Courseworks
  • Come to office hours:

    		Office	Phone	E-Mail	Office Hours
    Prof.	Martha Kim	CSB 469	212-939-7094	martha@cs.columbia.edu	Mondays and Wednesdays, 2:30-3:30pm
    TA	RJ Barker	Mudd TA Room			Sundays 3:00-4:30pm
    TA	Sam Beck	Mudd TA Room			Sundays 1:00-2:30pm
    TA	Rob Hendry	Mudd TA Room			Thursdays 11:30am-1:00pm
    TA	David Hughes	Mudd TA Room			Thursdays 1:00pm-2:30pm

  
  
  
• Textbook:

  Digital Design and Computer Architecture, by David Money Harris & Sarah L. Harris (ISBN: 978-0-12-3704979). Available at Bookculture.



• Grading Formula:
  • Homeworks (40%)
  • Midterm exam (30%)
  • Final exam (30%)
  We will keep all grades up to date in courseworks.


• Homeworks: There will be six homeworks over the course of the semester.
  • Homeworks are due at the start of class on their due date. We will not accept late submissions. If you cannot attend class, you can slip them under Prof. Kim's office door (CSB 469) ahead of time.
  • We will drop everyone's lowest homework grade when calculating final grades
  • You are free to discuss homework problems with your classmates, but each student must write up his or her own solution independently. You are expected to be able to explain and reproduce any work that you turn in.
  • Note the names of your collaborators at the top of your homework submission.
  • Finally, please help us out and staple all multipage assignments before handing them in.


• Regrade Policy: Students may request a regrade of any homework or exam within two weeks of the date it is returned to the class. If a regrade is requested the TA (or relevant course staff) will regrade the entire assignment including the particular problem in question.


• Academic Honesty: Apart from the above homework collaboration policy, the Computer Science Department's academic honesty policy, found here, applies to this course and will be enforced.

Syllabus and Handouts

Date	Topic	Reading	Lecture Slides	Homework Out	Homework Due
Wed 1/19	Introduction; Number Representations	H&H 1.1-1.4, 5.3	0_courseOverview.pdf, 1_numberRepresentation.pdf
Mon 1/24	Boolean Logic and Algebra: Algebraic Rules and Manipulation	H&H 2.1-2.7,2.9	2_booleanLogicAlgebra.pdf
Wed 1/26	Boolean Logic and Algebra: Standard Forms, K-Maps	H&H 2.1-2.7,2.9	2_booleanLogicAlgebra.pdf	HW #1
Mon 1/31	Boolean Logic and Algebra: K-Maps (cont.), Timing	H&H 2.1-2.7,2.9	2_booleanLogicAlgebra.pdf, 2bit_multiplier_soln.pdf
Wed 2/2	Combinational Circuit Design: Standard circuit blocks	H&H 2.8	2_booleanLogicAlgebra.pdf, 3_combinationalCircuits.pdf
Mon 2/7	Combinational Circuit Design: Standard and arithmetic circuits	H&H 5.2	3_combinationalCircuits.pdf		HW #1
Wed 2/9	Combinational Circuit Design: Arithmetic circuits	H&H 5.2	3_combinationalCircuits.pdf	HW #2
Mon 2/14	Sequential Elements: Latches, Flip-Flops	H&H 3.1-3.2	4_sequentialElements.pdf
Wed 2/16	Sequential Elements: Timing, Standard Blocks	H&H 3.5, 5.4	4_sequentialElements.pdf
Mon 2/21	Finite State Machine Design	H&H 3.5	5_fsmDesign.pdf		HW #2
Wed 2/23	Finite State Machine Design	H&H 3.5	5_fsmDesign.pdf	HW #3
Mon 2/28	FSM Design (Finish) + Storage (Begin)	H&H 5.5-5.6	6_memory.pdf
Wed 3/2	Storage: Memory and programmable arrays	H&H 5.5-5.6	6_memory.pdf
Mon 3/7	Midterm Review		Practice Midterm (Solutions)		HW #3
Wed 3/9	Midterm Exam (Solutions)
Mon 3/14	Spring Break / No Class!
Wed 3/16	Spring Break / No Class!
Mon 3/21	Instruction Set Architecture / MIPS ISA	H&H 6.1-6.7.1	7_mipsISA.pdf
Wed 3/23	Instruction Set Architecture / MIPS ISA	H&H 6.1-6.7.1	7_mipsISA.pdf
Mon 3/28	Instruction Set Architecture / MIPS ISA	H&H 6.1-6.7.1	7_mipsISA.pdf
Wed 3/30	Instruction Set Architecture / MIPS ISA	H&H 6.1-6.7.1	7_mipsISA.pdf	HW #4 + templates.tar.gz
Mon 4/4	Instruction Set Architecture / MIPS ISA	H&H 6.1-6.7.1	7_mipsISA.pdf
Wed 4/6	Performance Analysis, Single-cycle MIPS Implementation	H&H 7.1-7.3	8_performance.pdf, 9_singleCycleMIPS.pdf
Mon 4/11	Single-cycle MIPS Implementation	H&H 7.2-7.3	9_singleCycleMIPS.pdf		HW 4 (solns)
Wed 4/13	Pipelined MIPS Implementation	H&H 7.5	10_pipelinedMIPS.pdf	HW #5
Mon 4/18	Pipelined MIPS Implementation	H&H 7.5	10_pipelinedMIPS.pdf
Wed 4/20	Cache Design	H&H 8.2-8.3	11_caches.pdf	HW #6	HW #5
Mon 4/25	Advanced Topics / Modern Computer Architecture
Wed 4/27	Advanced Topics / Graphics Architectures
Mon 5/2	Review Session	Spring '10 Final(solution)			HW #6
Mon 5/9 (1:10pm-4:00pm)	Final Exam

(Return to top)