Tentative Timetable

Jan 16

Course introduction. Review of concepts in computer architecture: cache memories, pipelining, virtual memory, performance counters, SIMD instructions, branch prediction, SMT, instruction scheduling, multiple functional units. Sample processors: Intel Pentium 4, Sun T1, IBM PowerPC, IBM Cell processor. Code portability. The importance of compilers. Resorting to assembly language when necessary.

Jan 23

Review of concepts in database systems: join algorithms, indexes, query plans with pipelining, transaction processing, compression/decompression, estimating space and time requirements. Quantification of performance bottlenecks.

Jan 30

Improving data cache performance (I): coloring, tiling, alignment, placement of concurrently accessed items within records (e.g., data morphing); cache-oblivious algorithms.

Feb 6

Improving data cache performance (II): blocking, software and hardware prefetching, buffering.

Feb 13

Improving instruction cache performance: buffering, mini-threads.

Feb 20

SIMD for parallelism and for reducing branches; converting control dependencies into data dependencies.

Feb 27

Reducing/eliminating branch misprediction penalites, e.g., for scans, decompression, hashing.

Mar 6

Using SMT processors.

Mar 20

Models of parallelism for multicore processors. Cilk.

Mar 27

Using graphics cards for database work.

Apr 3

Student presentations I

Apr 10

Student presentations II

Apr 17

Programming the Cray MTA-2.

Apr 24

Course summary and discussion of future trends.