Professional
I am now a Member of the Technical Staff at Aster Data Systems.
PhD Research
I have successfully completed my PhD in the Computer Science Department at Columbia University. My dissertation topic was Architecture-Sensitive Database Query Processing on Chip Multiprocessos. While at Columbia I was a member of the database research group and my research advisor was Professor Ken Ross.
My PhD research focussed on architecture sensitive database design with the goal of discovering better ways to utilize modern hardware during database operations. In particular I developed techniques to take advantage of multicore processors as well as simultaneous multithreading technology (SMT). This research resulted in a number of publications.
At VLDB 2007 I presented "Adaptive Aggregation on Chip Multiprocessors". This work examines the tension that exists between the benefits of improving the cache behavior of database operations on chip multiprocessors through inter-thread shared datastructures and the costs associated with fine graine thread cooperation. In the context of hash-based aggregation, different strategies for managing this tradeoff differ by an order of magnitude when processing input with different distribution characterics. We then propose an algorithm that chooses the correct aggregation strategy when presented with many common input distributions.
At the 2007 DaMoN workshop, which is colocated with SIGMOD/PODS I presented a paper on "Parallel Buffers for Chip Multiprocessors". The proposed parallel buffer is a data structure that facillitates intra-operator parallelism on chip multiprocessors. The aggregation technique explored in the VLDB 2007 paper described above is one example of intra-operator parallelism on chip multiprocessors.
As a Department of Homeland Security Fellow, I spent the summer of 2006 working on DHS related research at Lawrence Berkeley National Laboratory. My work at LBL focussed on integrating LBL's compressed bitmap technology, FastBit, into a relational database management system and then using that compressed bitmap indexing to accelerate database queries as well as hybrid database-information retrieval operations.
During the summer of 2005 I had the opportunity to intern at Sandia National Laboratories where I investigated the performance of database operations on the Cray MTA-2, a massively multithreaded architecture. This research is featured in the paper, "Realizing Parallelism in Database Operations: Insights from a Massively Multithreaded Architecture", which won the best paper award at DaMoN 2006 (paper, slides). In addition to working at Sandia, I also had an opportunity to attend the 2006 Salishan Conference on High-Speed Computing, which is organized annually by Los Alamos, Lawrence Livermore, and Sandia National Laboratories. The topic of that year's conference was data intensive computing and focussed on the challenges facing HPC as applications diverge from the HPC stallwart of scientific computing to also include data intensive applications over petabyte or even exobyte sized data.
At VLDB 2005, I presented "Improving Database Performance on Simultaneous Multithreading Processors" (paper, slides), which explored how best to optimize database operations for simultaeous multithreadng architectures.
Check out my publications.
Undergraduate Research
I worked as an undergraduate research assistant for Professor Jennifer Widom's STREAM Project. The STREAM Project researched data streams and built a prototype data stream management system.
My senior honors thesis, Attacks and Accidents: Policy to Protect the Power Grid's Critical Computing and Communication Needs, won the 2004 William J. Perry Award for the Stanford Honors Thesis that Best Exemplifies Interdisciplinary Research in International Security Studies. My thesis was advised by Professor Michael May.