EE E3910 Elements of Digital Systems

Call number 21046

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Lecturer/Manager  Professor Dan Rubenstein
Office hours: Location: CEPSR 816
Weekly time: Tu,Th 2:30-3:30 pm.
Also at other times by appointment 
Office phone: (212) 854-0050
Email address:
Day & Time Class  
Meets on Campus:
Tue,Thurs 1:10-2:25pm 
Location: 644 Mudd
Credits for Course: 3
Class Type: Lecture
Teaching Assistant: Angelos Stavrou (
  • Office: 908 CEPSR
  • Office Hours: M,W: 11am-12pm
  • Mailbox: TBD
  • Phone: TBD
  • Prerequisites: 
    • None.
    Description:  Topics: Theory of digital systems. Digital coding of information. Study of combinational and sequential system design. Finite-state machines. Microcode. Computer arithmetic. Microprocessors.

    The purpose of this course is to introduce you to logic design, digital system design, and computer design. What you will learn here will give you a fundamental understanding of how computers work. We will be dealing mostly with binary operations: 1's and 0's and how these two values are applied to produce any computation that is doable on a computer.  

    Required text(s): 
    • M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals (2nd edition) , Prentice Hall, 2001. ISBN 0-13-031486-2. 

    Reference text(s): 
    • Norman Balabanian and Bradley Carlson, Digital Logic Design Principles John Wiley & Sons, 2001. ISBN 0-471-29351-2 

    • John F. Wakerly, Digital Design, Principles & Practices (3rd edition) , Prentice Hall, 2001. ISBN 0-13-089896-1. 
    Homework(s):  Unless otherwise specified, homework will be due one week after it is assigned and should be turned in at the beginning of class. At that time, you must turn in a physical copy of the assignment. E-mailed homework and late assignments will not be accepted unless approved in advance. Approval will only be given under extreme circumstances. You are expected to produce your work in a timely manner.

    You may discuss and work on questions with other students in the class. However, you should write your solutions on your own. In other words, if I were to later ask you to re-derive one of your homework solutions or to solve a similar problem when you were without your friends, you should be able to do so or have a clear understanding of how to approach the problem. This can only be learned by doing, so you should do your homework. 

    Midterm exam:  Closed book, 10/25 during classtime 
    Final exam:  Date/time TBD 
    Class / office-hour participation:  If you ace your tests and homeworks, you will get an A+, even if you do not participate in class or come to office hours. However, if you don't ace your tests and homeworks, but you can demonstrate to me that you have learned the material in another fashion (mainly via office-hour discussion in which you work through additional problems), you can improve by up to one letter grade (e.g., C to a B). To reiterate, it is possible to improve your grade by demonstrating an understanding of the material.  
    Grading:  Assignments 20%, midterm 25%, final 35%, class participation 20% 
    A note on exams:  I am more interested in your gaining an understanding of and developing an intuition for why certain rules, laws, and techniques hold and are used. I am less interested in your ability to memorize these rules, laws and techniques and blindly apply them without intuition as to why they work. Thus, I will try to design the midterm and final questions to test your understanding of the concepts, not your memorization skills. I realize that some memorization will undoubtebly be required, but hopefully the memorized concepts will be those that can be rederived via your intuition.
    Computer hardware and software requirements:  None 
    Homework submission:  Due 1 week after assignment before class. 

    Course Outline

    Schedule subject to change.
    Date   #   Topics/chapters covered   Reading (before class)   Assigned   Due  
    9/4   1   Course information; introduction; non-decimal number systems; decimal and alphanumerical codes; binary logic and gates   1, 2.1   HW #1 [PS,PDF](due 9/11)    
    9/6   2   Boolean algebra   2.2      
    9/11   3   Standard forms   2.3      
    9/13   4   Map simplification   2.4   HW #2 [PS,PDF] (due 9/25)    
    9/18   5   Map manipulation   2.5     HW #1  
    9/20   6   NAND and NOR Gates   2.6-2.7      
    9/25   7   IC Families, CMOS, Combinatorial circuits; analysis and design procedures; decoders   2.8-2.9,3.1-3.5   HW #3 [PS,PDF] (due 10/2)   HW #2  
    9/27   8   Yom Kippur: NO CLASS        
    10/2   9   Encoders; Multiplexers   3.6-3.7   HW #4 [PS,PDF] (due 10/11)   HW #3  
    10/4   10   Binary adders; binary subtraction   3.8-3.9      
    10/9   11   Binary adder-subtractors; multipliers   3.10   HW #5 [PS,PDF] (due 10/18)    
    10/11   12   Intro to sequential circuits, latches   4.1-4.2     HW #4  
    10/16   13   NO CLASS        
    10/18   14   Flip-flops: master-slave; edge-triggered; characteristic tables; sequential circuit analysis   4.3-4.4   HW #6 HTML (due 10/30)   HW #5  
    10/23   15   Sequential circuit design; design using D and JK flip-flops   4.5-4.7      
    10/25   16   MIDTERM EXAM        
    10/30   17   Registers; shift registers; ripple counter   5.1-5.4     HW #6  
    11/1   18   Synchronous binary counters. Other counters.   5.5-5.7      
    11/6   19   Election Day: NO CLASS        
    11/8   20   RAM; ECC RAM   6.1-6.5   HW #7&8 HTML (due 11/15)    
    11/13   21   PLA; PAL; VLSI Programmable logic devices   6.6-6.10   HW #9 (due 11/20)    
    11/15   22   Datapaths and operations; register transfer operations; microoperations; multiplexer and bus-based transfer; datapaths   7.1-7.6     HW #7-8  
    11/20   23   The ALU; shifter; control word; pipelining   7.7-7.12      
    11/22   24   Thanksgiving Day: NO CLASS        
    11/27   25   Control unit; algorithmic state machines; design example: binary multiplier   8.1-8.3   HW #9&10 HTML (due 12/6)    
    11/29   26   Binary multiplier with hard-wired and microprogrammed control   8.4-8.5      
    12/4   27   A simple computer architecture; single cycle hardwired control; multiple cycle microprogrammed control; pipelining; instruction set architecture   8.6-8.9, 9.1-9.3      
    12/6   28   Special Topics; Review     HW 9&10    
    12/18 1:10-4pm     FINAL EXAM, Mudd 633        

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