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#1 |
Course Information ( PDF ) |
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#2 |
Syllabus ( PDF ) |
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#3 |
Homework, Project and Exam Schedule ( PDF ) |
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#4 |
Questionnaire ( PDF ) |
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#5 |
Quine-McCluskey (QM) Examples ( PDF ) |
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#6 |
The Quine-McCluskey Method ( PDF ) |
| #7 |
Introduction to Espresso: Examples ( PDF ) |
| #8 |
Hachtel/Somenzi: Multi-output functions pp. 160-165 ( PDF ) |
| #9 |
Hachtel/Somenzi: Heuristic minimization of two-level circuits pp. 185-191 ( PDF ) |
| #10 |
Espresso Algorithm Handout #1 ( PDF ) |
| #11 | Homework # 1 ( PDF ) |
| #11a | Homework #1 Problem 1 ( TXT ) ( Getting Started with SIS ) |
| #12 |
Rudell's Thesis: Chapters 1 and 2 ( PDF ) |
| #13 | Espresso Algorithm Handout #2 ( PDF ) |
| #13a |
De Micheli, Preface and Ch. 1 (out of print ) ( PDF ) |
| #14 | Handout of Examples ( PDF ) |
| #15 | Hachtel/Somenzi: chs. 5.2-5.7 ( PDF ) |
| #16 | Overview of Tautology Checking ( PDF ) |
| #16a | De Micheli: ch. 7.1; ch. 7.2; ch 7.4.5 (out of print ) ( PDF ) |
| #17 | Overview of Fast Complementation ( PDF ) |
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#18 |
Hachtel/Somenzi: chs. 5.8 (problems) ( PDF ) |
| #19 | Homework #2 ( PDF ) |
| #20 | Overview of Fast Prime Generation ( PDF ) |
| #21 | Prime Generation Problem Example ( PDF ) |
| #22 | Rudell's Master's thesis (UC Berkeley): chs. 4.7-4.8 Last_gasp, super_gasp, make_sparse ( PDF ) |
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#23 |
Challenges of Multi-Output 2-level Logic Minimization ( PDF ) |
| #23a | De Micheli: ch. 3.3.2; ch. 8.1; ch. 8.2; (out of print ) (Hardcopy only) |
| #23b | De Micheli: ch. 8.3, pp. 360-380 (out of print ) (Hardcopy only) |
| #24 | Homework #1 Solutions (Hardcopy only) |
| #25 | Homework #3 ( PDF ) |
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#26 |
Kernels, Co-Kernels and Extraction Examples ( PDF ) |
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#27, #27(a-c) |
#27 Midterm CAD Mini-Project ( PDF ) #27a Midterm CAD SIS Multilevel Tutorial ( TXT ) #27b Midterm CAD SIS Techmap Tutorial ( TXT ) #27c Midterm CAD SIS Application Problem ( TXT ) |
| #28 | Technology Mapping, De Micheli: 10.1, 10.2, 10.3 (out of print ) (Hardcopy only) |
| #28a | Dynamic Programming, De Micheli: ch. 2.3.4 (out of print ) (Hardcopy only) |
| #29 | Homework #2 Solutions (Hardcopy only) |
| #30 | Homework #3 Solutions (Hardcopy only) |
| #31 | Homework #4 ( PDF ) |
| #32 | Technology Mapping: Basic Tree-Based Covering Example ( PDF ) |
| #33 | Delay-Oriented Technology Mapping Handout ( PDF ) |
| #34 | De Micheli: Architectural Synthesis: Examples and Models, pp. 18-19, pp. 119-123 (out of print ) (Hardcopy only) |
| #35 |
De Micheli: Architectural Synthesis: ch 4, pp. 141-153 (out of print ) (Hardcopy only) |
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#36 |
OBDD Handout ( PDF ) |
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#37, #37(a-g) |
FINAL CAD MINI-PROJECT |
| #38 | Midterm CAD Mini-Project Solutions (Hardcopy only) |
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#39 |
De Micheli, ch. 8.4 Intro. to the Boolean Model, pp. 380-bottom p. 384 (out of print ) (Hardcopy only) |
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#40 |
Devadas, Don't-Care Based Optimization. (Hardcopy only) |
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#41 |
Homework #4 Solutions (Hardcopy only) |
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#42 |
De Micheli, ch. 9.3.1 Retiming, pp. 462- 467. (out of print ) (Hardcopy only) |
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#43 |
Retiming Synchronous Circuitry (C.E. Leiserson/J.B. Saxe, Digital SRC Tech report, Aug. 1986) ( PDF ) |
Last Updated: 4/28/09