  Below is a list of selected publications of our group. Most are
available electronically, in PostScript or PDF format. For copies of other
publications, please contact the author(s) directly.

"SelfTimed CarryLookahead Adders" [pdf]
F.C. Cheng, S.H. Unger and M. Theobald
IEEE Transactions on Computers, Special Issue on Computer Arithmetic,
Volume 49, Issue 7, July 2000, Pp. 659672.


"A LowLatency FIFO for MixedClock Systems" [pdf][ps]
T. Chelcea and S.M. Nowick
Proceedings of the IEEE Workshop on VLSI (WVLSI), 2000, Pp. 119126.


"LowLatency Asynchronous FIFO's Using Token Rings" [pdf] [ps]
T. Chelcea and S.M. Nowick
Proceedings of the Sixth International Symposium on Advanced Research in
Asynchronous Circuits and Systems (ASYNC'00), 2000, Pp. 210220.


"Synthesis for Logical Initializability of Synchronous FiniteState
Machines" [pdf] [ps]
M. Singh and S.M. Nowick
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 8,
Oct. 2000, Pp. 542557.


"FineGrain Pipelined Asynchronous Adders for HighSpeed DSP Applications"
[pdf] [ps]
M. Singh and S.M. Nowick
Proceedings of the IEEE Computer Society Workshop on VLSI (WVLSI), 2000,
Pp. 111118.


"HighThroughput Asynchronous Pipelines for FineGrain Dynamic Datapaths"
[pdf] [ps]
M. Singh and S.M. Nowick
Proceedings of the Sixth International Symposium on Advanced Research in
Asynchronous Circuits and Systems (ASYNC'00), 2000, Pp. 198209. Best Paper
Award.


"A PowerEfficient Duplex Communication System" [pdf] [ps]
S.B. Furber, A. Efthymiou, and M. Singh
Workshop on Asynchronous Interfaces: Tools, Techniques and Implementations
(AINT2000), Delft, The Netherlands, July 2000. 
1999

"Scanning the Technology: Applications of Asynchronous Circuits" [pdf] [ps]
C.H. Van Berkel, M.B. Josephs, and S.M. Nowick
Proceedings of the IEEE, Volume 87, Issue 2, Feb. 1999, Pp. 223233.


"OPTIMISTA: State Minimization of Asynchronous FSMs for Optimum Output
Logic" [pdf] [ps]
R.M. Fuhrer and S.M. Nowick
Proceeding of the International Conference on Computeraided design, 1999,
Pp. 713.


"Sequential Optimization of Asynchronous and Synchronous FiniteState
Machines: Algorithms and Tools" [pdf] [ps]
R.M. Fuhrer
PhD Thesis, Computer Science Department, Columbia University, 1999.


"MINIMALIST: An Environment for the Synthesis, Verification and
Testability of BurstMode Asynchronous Machines" [pdf] [ps]
R.M. Fuhrer, S.M. Nowick, M. Theobald, N.K. Jha, B. Lin, and L. Plana
Technical Report CUCS02099, Computer Science Department, Columbia
University, July 1999. 
1998

"Fast Heuristic and Exact Algorithms for TwoLevel HazardFree Logic
Minimization" [pdf]
M. Theobald and S. Nowick
IEEE Transactions on ComputerAided Design, Volume 11, Nov. 1998, Pp. 11301147.


"An Implicit Method for HazardFree TwoLevel Logic Minimization"
[pdf]
M. Theobald and S. Nowick
IEEE International Symposium on Advanced Research in Asynchronous
Circuits and Systems (ASYNC'98), March 1998, Pp. 5869. Best Paper Finalist.


"A Fast Asynchronous Huffman Decoder for CompressedCode Embedded
Processors" [pdf] [ps]
R. Benes, S.M. Nowick, and A. Wolfe
Proceedings of the Fourth International Symposium on Advanced Research in
Asynchronous Circuits and Systems (ASYNC'98), March 1998, Pp. 4356. 
1997

"Synthesis of LowPower Asynchronous Circuits in a Specified Environment"
[pdf]
S.M. Nowick and M. Theobald
International Symposium on Low Power Electronics and Design, August 1997,
Pp. 9295.


"A HighSpeed Asynchronous Decompression Circuit for Embedded Processors"
[pdf] [ps]
M. Benes, A. Wolfe, and S.M. Nowick
Proceedings of the Seventeenth Conference on Advanced Research in VLSI,
1997, Pp. 219236.


"Synthesis of Asynchronous Circuits for Stuckat and Robust Path Delay
Fault Testability" [pdf] [ps]
S.M. Nowick, N.K. Jha, and F.C. Cheng
IEEE Transactions on ComputerAided Design of Integrated Circuits and
Systems, Volume 16, Issue 12, Dec. 1997, Pp. 15141521.


"Speculative Completion for the Design of HighPerformance Asynchronous
Dynamic Adders" [pdf] [ps]
S.M. Nowick, K.Y. Yun, P.A. Beerel, and A.E. Dooply
Proceedings of the Third International Symposium on Advanced Research in
Asynchronous Circuits and Systems (ASYNC'97), 1997, Pp. 210223.


"Synthesis for Logical Initializability of Synchronous Finite State
Machines" [pdf] [ps]
M. Singh and S.M. Nowick
Proceedings of the Tenth International Conference on VLSI Design, 1997,
Pp. 7680.


"An Introduction to Asynchronous Circuit Design" [pdf] [ps]
A. Davis and S.M. Nowick
Technical Report UUCS97013, Computer Science Department, University of
Utah, Sep. 1997. 
1996

"Fast OFDDBased Minimization of Fixed Polarity ReedMuller Expressions"
[pdf]
R. Drechsler, M. Theobald, and B. Becker
IEEE Transactions on Computers, Volume 45, Issue 11, November 1996,
Pp. 12941299.


"EspressoHF: A Heuristic HazardFree Minimizer for TwoLevel Logic"
[pdf]
M. Theobald, S.M. Nowick, T. Wu
Proceedings of the 33rd Annual Design Automation Conference (DAC),
1996, Pp. 7176.


"SynthesisforInitializability of Asynchronous Sequential Machines" [pdf] [ps]
M. Singh and S.M. Nowick
Proceedings of the International Test Conference, 1996, Pp. 232241.


"State Assignment for Initializability of Synchronous Finite State
Machines" [pdf] [ps]
M. Singh and S.M. Nowick
International Test Synthesis Workshop, Santa Barbara, CA, May 1996. 
1995

"Symbolic HazardFree Minimization and Encoding of Asynchronous Finite
State Machines" [pdf] [ps]
R.M. Fuhrer, B. Lin, and S.M. Nowick
Proceedings of the IEEE/ACM International Conference on ComputerAided
Design (ICCAD95), 1995, Pp. 604611.


"Exact TwoLevel Minimization of HazardFree Logic with MultipleInput
Changes" [pdf] [ps]
S.M. Nowick and D.L. Dill
IEEE Transactions on ComputerAided Design of Integrated Circuits and
Systems, Volume 14, Issue 8, Aug. 1995, Pp. 986997.


"Automatic Synthesis of BurstMode Asynchronous Controllers" [pdf] [ps]
S.M. Nowick
Technical Reporst CSLTR95686, Computer Science Department, Stanford
University, Dec. 1995. 
1994

"Fast OFDD based Minimization of Fixed Polarity ReedMuller Expressions"
[pdf]
R. Drechsler, M. Theobald, and B. Becker
European Design Automation Conference (EuroDAC), Sep. 1994, Pp. 27.

